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TTGO-T-Beam-LoRa-APRS
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M0IGA corrections in the BG_RF95 library

This commit is contained in:
Rysiek Labus 2021-03-09 17:12:57 +01:00
parent 67857940c1
commit c0c3eb76d2
3 changed files with 13 additions and 9 deletions
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2
data_embed/index.html
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@ -165,7 +165,7 @@
</section> </section>
</div> </div>
<footer> <footer>
<center><b>Contributors in order of appearance:</b> OE1ACM, OE3CJB, SQ9MDD, SQ5RWU, DJ1AN</center> <center><b>Contributors in order of appearance:</b> OE1ACM, OE3CJB, SQ9MDD, SQ5RWU, DJ1AN, M0IGA</center>
<center><b>Latest stable version:</b> <a href=https://github.com/SQ9MDD/TTGO-T-Beam-LoRa-APRS>https://github.com/SQ9MDD/TTGO-T-Beam-LoRa-APRS</a></center> <center><b>Latest stable version:</b> <a href=https://github.com/SQ9MDD/TTGO-T-Beam-LoRa-APRS>https://github.com/SQ9MDD/TTGO-T-Beam-LoRa-APRS</a></center>
<center><b>Licensed under:</b> CC BY-NC-SA</center> <center><b>Licensed under:</b> CC BY-NC-SA</center>
<center><!--VERSION--></center> <center><!--VERSION--></center>

4
lib/BG_RF95/BG_RF95.cpp
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@ -23,6 +23,8 @@ PROGMEM static const BG_RF95::ModemConfig MODEM_CONFIG_TABLE[] =
{ 0x48, 0x94, 0x00}, // Bw31_25Cr48Sf512 { 0x48, 0x94, 0x00}, // Bw31_25Cr48Sf512
{ 0x78, 0xc4, 0x00}, // Bw125Cr48Sf4096 { 0x78, 0xc4, 0x00}, // Bw125Cr48Sf4096
{ 0x72, 0xc7, 0x8}, // BG 125 cr45 sf12 { 0x72, 0xc7, 0x8}, // BG 125 cr45 sf12
{ 0x72, 0xb4, 0x00}, // Bw125Cr45Sf2048
{ 0x88, 0xc4, 0x00}, // Bw250Cr48Sf4096
}; };
BG_RF95::BG_RF95(uint8_t slaveSelectPin, uint8_t interruptPin, RHGenericSPI& spi) BG_RF95::BG_RF95(uint8_t slaveSelectPin, uint8_t interruptPin, RHGenericSPI& spi)
@ -112,7 +114,7 @@ bool BG_RF95::init()
// setModemConfig(Bw125Cr48Sf4096); // slow and reliable? // setModemConfig(Bw125Cr48Sf4096); // slow and reliable?
setPreambleLength(8); // Default is 8 setPreambleLength(8); // Default is 8
// An innocuous ISM frequency, same as RF22's // An innocuous ISM frequency, same as RF22's
setFrequency(433.800); setFrequency(433.850);
// Lowish power // Lowish power
setTxPower(20); setTxPower(20);

16
lib/BG_RF95/BG_RF95.h
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@ -183,15 +183,15 @@
// BG_RF95_REG_1D_MODEM_CONFIG1 0x1d // BG_RF95_REG_1D_MODEM_CONFIG1 0x1d
#define BG_RF95_BW 0xc0 #define BG_RF95_BW 0xc0
#define BG_RF95_BW_125KHZ 0x00 #define BG_RF95_BW_125KHZ 0x70
#define BG_RF95_BW_250KHZ 0x40 #define BG_RF95_BW_250KHZ 0x80
#define BG_RF95_BW_500KHZ 0x80 #define BG_RF95_BW_500KHZ 0x90
#define BG_RF95_BW_RESERVED 0xc0 #define BG_RF95_BW_RESERVED 0xc0
#define BG_RF95_CODING_RATE 0x38 #define BG_RF95_CODING_RATE 0x38
#define BG_RF95_CODING_RATE_4_5 0x00 #define BG_RF95_CODING_RATE_4_5 0x02
#define BG_RF95_CODING_RATE_4_6 0x08 #define BG_RF95_CODING_RATE_4_6 0x04
#define BG_RF95_CODING_RATE_4_7 0x10 #define BG_RF95_CODING_RATE_4_7 0x06
#define BG_RF95_CODING_RATE_4_8 0x18 #define BG_RF95_CODING_RATE_4_8 0x08
#define BG_RF95_IMPLICIT_HEADER_MODE_ON 0x04 #define BG_RF95_IMPLICIT_HEADER_MODE_ON 0x04
#define BG_RF95_RX_PAYLOAD_CRC_ON 0x02 #define BG_RF95_RX_PAYLOAD_CRC_ON 0x02
#define BG_RF95_LOW_DATA_RATE_OPTIMIZE 0x01 #define BG_RF95_LOW_DATA_RATE_OPTIMIZE 0x01
@ -547,6 +547,8 @@ public:
Bw31_25Cr48Sf512, ///< Bw = 31.25 kHz, Cr = 4/8, Sf = 512chips/symbol, CRC on. Slow+long range Bw31_25Cr48Sf512, ///< Bw = 31.25 kHz, Cr = 4/8, Sf = 512chips/symbol, CRC on. Slow+long range
Bw125Cr48Sf4096, ///< Bw = 125 kHz, Cr = 4/8, Sf = 4096chips/symbol, CRC on. Slow+long range Bw125Cr48Sf4096, ///< Bw = 125 kHz, Cr = 4/8, Sf = 4096chips/symbol, CRC on. Slow+long range
Bw125Cr45Sf4096, ///< APRS Bw125Cr45Sf4096, ///< APRS
Bw125Cr45Sf2048, ///<Bw = 125 kHz Cr = 4/5, Sf= 2048 chips/symbol, CRC on.
Bw250Cr48Sf4096, ///< Bw = 250 kHz, Cr = 4/8, Sf = 4096chips/symbol, CRC on.
} ModemConfigChoice; } ModemConfigChoice;
/// Constructor. You can have multiple instances, but each instance must have its own /// Constructor. You can have multiple instances, but each instance must have its own