DMR - Cap+/XPT Misc Tuning/Reset Tweaks;
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@ -1262,7 +1262,7 @@ void dmr_cspdu (dsd_opts * opts, dsd_state * state, uint8_t cs_pdu_bits[], uint8
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if (t_tg[j] != 0 && state->p25_cc_freq != 0 && opts->p25_trunk == 1 && (strcmp(mode, "B") != 0) && (strcmp(mode, "DE") != 0))
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{
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//debug print for tuning verification
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fprintf (stderr, "\n LSN/TG to tune to: %d - %d", j+1, t_tg[j]);
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// fprintf (stderr, "\n LSN/TG to tune to: %d - %d", j+1, t_tg[j]);
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if (state->trunk_chan_map[j+1] != 0) //if we have a valid frequency
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{
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@ -1286,12 +1286,12 @@ void dmr_cspdu (dsd_opts * opts, dsd_state * state, uint8_t cs_pdu_bits[], uint8
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}
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//end TG set on tune
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}
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if (GetCurrentFreq(opts->rigctl_sockfd) != state->trunk_chan_map[j+1])
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dmr_reset_blocks (opts, state); //reset all block gathering since we are tuning away from current frequency
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if (opts->setmod_bw != 0 ) SetModulation(opts->rigctl_sockfd, opts->setmod_bw);
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SetFreq(opts->rigctl_sockfd, state->trunk_chan_map[j+1]);
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state->p25_vc_freq[0] = state->p25_vc_freq[1] = state->trunk_chan_map[j+1];
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opts->p25_is_tuned = 1; //set to 1 to set as currently tuned so we don't keep tuning nonstop
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dmr_reset_blocks (opts, state); //reset all block gathering since we are tuning away
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j = 11; //break loop
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}
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@ -1316,11 +1316,17 @@ void dmr_cspdu (dsd_opts * opts, dsd_state * state, uint8_t cs_pdu_bits[], uint8
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}
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//end TG set on tune
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}
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rtl_dev_tune (opts, state->trunk_chan_map[j+1]);
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uint32_t temp = (uint32_t)state->trunk_chan_map[j+1];
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if (opts->rtlsdr_center_freq != temp)
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{
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dmr_reset_blocks (opts, state); //reset all block gathering since we are tuning away from current frequency
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rtl_dev_tune (opts, state->trunk_chan_map[j+1]); //unlike rigctl, using this actually interrupts signal decodes (rtl_clean_queue)
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//debug print for tuning verification
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// fprintf (stderr, "\n RTL LSN/TG to tune to: %d - %d", j+1, t_tg[j]);
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}
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// else fprintf (stderr, "\n DONT RTL LSN/TG to tune to: %d - %d", j+1, t_tg[j]); //debug
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state->p25_vc_freq[0] = state->p25_vc_freq[1] = state->trunk_chan_map[j+1];
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opts->p25_is_tuned = 1;
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dmr_reset_blocks (opts, state); //reset all block gathering since we are tuning away
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j = 11; //break loop
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#endif
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}
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@ -1689,13 +1695,14 @@ void dmr_cspdu (dsd_opts * opts, dsd_state * state, uint8_t cs_pdu_bits[], uint8
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}
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//debug
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fprintf (stderr, " - Freq: %ld", state->trunk_chan_map[j+xpt_bank+1]);
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// fprintf (stderr, " - Freq: %ld", state->trunk_chan_map[j+xpt_bank+1]);
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if (GetCurrentFreq(opts->rigctl_sockfd) != state->trunk_chan_map[j+xpt_bank+1])
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dmr_reset_blocks (opts, state); //reset all block gathering since we are tuning away from current frequency
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if (opts->setmod_bw != 0 ) SetModulation(opts->rigctl_sockfd, opts->setmod_bw);
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SetFreq(opts->rigctl_sockfd, state->trunk_chan_map[j+xpt_bank+1]);
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state->p25_vc_freq[0] = state->p25_vc_freq[1] = state->trunk_chan_map[j+xpt_bank+1];
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opts->p25_is_tuned = 1; //set to 1 to set as currently tuned so we don't keep tuning nonstop
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dmr_reset_blocks (opts, state); //reset all block gathering since we are tuning away
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j = 11; //break loop
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}
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@ -1721,13 +1728,17 @@ void dmr_cspdu (dsd_opts * opts, dsd_state * state, uint8_t cs_pdu_bits[], uint8
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//end TG set on tune
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}
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//debug
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fprintf (stderr, " - Freq: %ld", state->trunk_chan_map[j+xpt_bank+1]);
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rtl_dev_tune (opts, state->trunk_chan_map[j+xpt_bank+1]);
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uint32_t temp = (uint32_t)state->trunk_chan_map[j+xpt_bank+1];
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if (opts->rtlsdr_center_freq != temp)
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{
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dmr_reset_blocks (opts, state); //reset all block gathering since we are tuning away from current frequency
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rtl_dev_tune (opts, state->trunk_chan_map[j+xpt_bank+1]); //unlike rigctl, using this actually interrupts signal decodes (rtl_clean_queue)
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//debug print for tuning verification
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fprintf (stderr, " - Tune to Freq: %ld", state->trunk_chan_map[j+xpt_bank+1]);
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}
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else fprintf (stderr, " - Dont Tune Freq: %ld", state->trunk_chan_map[j+xpt_bank+1]);
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state->p25_vc_freq[0] = state->p25_vc_freq[1] = state->trunk_chan_map[j+xpt_bank+1];
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opts->p25_is_tuned = 1;
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dmr_reset_blocks (opts, state); //reset all block gathering since we are tuning away
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j = 11; //break loop
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#endif
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}
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