commit
5a3061f942
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@ -1013,7 +1013,9 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power);
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bool Hamming17123(uint8_t* d);
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uint8_t crc8(uint8_t bits[], unsigned int len);
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bool crc8_ok(uint8_t bits[], unsigned int len);
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//modified CRC functions for SB/RC
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uint8_t crc7(uint8_t bits[], unsigned int len);
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uint8_t crc3(uint8_t bits[], unsigned int len);
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//LFSR and LFSRP code courtesy of https://github.com/mattames/LFSR/
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void LFSR(dsd_state * state);
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@ -96,6 +96,10 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
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//Run Loop while the getting is good
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while (loop == 1) {
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memset (ambe_fr, 0, sizeof(ambe_fr));
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memset (ambe_fr2, 0, sizeof(ambe_fr2));
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memset (ambe_fr3, 0, sizeof(ambe_fr3));
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internalslot = -1; //reset here so we know if this value is being set properly
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for(i = 0; i < 12; i++)
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{
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@ -494,6 +498,10 @@ void dmrBSBootstrap (dsd_opts * opts, dsd_state * state)
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char ambe_fr2[4][24];
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char ambe_fr3[4][24];
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memset (ambe_fr, 0, sizeof(ambe_fr));
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memset (ambe_fr2, 0, sizeof(ambe_fr2));
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memset (ambe_fr3, 0, sizeof(ambe_fr3));
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//memcpy of ambe_fr for late entry
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char m1[4][24];
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char m2[4][24];
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@ -45,6 +45,13 @@ void dmr_data_burst_handler(dsd_opts * opts, dsd_state * state, uint8_t info[196
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uint8_t LC_DataBytes[10];
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int Burst = -1;
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memset (BPTCDeInteleavedData, 0, sizeof(BPTCDeInteleavedData));
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memset (BPTCDmrDataBit, 0, sizeof(BPTCDmrDataBit));
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memset (BPTCDmrDataByte, 0, sizeof(BPTCDmrDataByte));
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memset (BptcDataMatrix, 0, sizeof(BptcDataMatrix));
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memset (LC_DataBit, 0, sizeof(LC_DataBit));
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memset (LC_DataBytes, 0, sizeof(LC_DataBytes));
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//PDU Bytes and Bits
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uint8_t DMR_PDU[25];
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uint8_t DMR_PDU_bits[196];
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@ -433,6 +433,8 @@ void dmr_flco (dsd_opts * opts, dsd_state * state, uint8_t lc_bits[], uint32_t C
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}
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else
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{
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//Observation: If RS3 is set, or just the bit at location 0001 0000,
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//then the NEXT VC6 will be pre-empted for TXI
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//REMUS! Uncomment Line Below if desired
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// strcat (state->call_string[slot], " RES");
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fprintf(stderr, "RS%d ", (so & 0x30) >> 4);
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@ -512,14 +514,35 @@ void dmr_flco (dsd_opts * opts, dsd_state * state, uint8_t lc_bits[], uint32_t C
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}
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}
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if (state->K != 0 && fid == 0x10 && so & 0x40)
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//BUGFIX: Include slot and algid so we don't accidentally print more than one loaded key
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//this can happen on Missing PI header and LE when the keyloader has loaded a TG/Hash key and an RC4 key simultandeously
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//subsequennt EMB would print two key values until call cleared out
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if (state->K != 0 && fid == 0x10 && so & 0x40 && slot == 0 && state->payload_algid == 0)
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{
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fprintf (stderr, "%s", KYEL);
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fprintf (stderr, "Key %lld ", state->K);
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fprintf (stderr, "%s ", KNRM);
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}
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if (state->K != 0 && fid == 0x10 && so & 0x40 && slot == 1 && state->payload_algidR == 0)
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{
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fprintf (stderr, "%s", KYEL);
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fprintf (stderr, "Key %lld ", state->K);
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fprintf (stderr, "%s ", KNRM);
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}
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if (state->K1 != 0 && fid == 0x68 && so & 0x40)
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if (state->K1 != 0 && fid == 0x68 && so & 0x40 && slot == 0 && state->payload_algid == 0)
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{
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if (state->K2 != 0) fprintf (stderr, "\n ");
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fprintf (stderr, "%s", KYEL);
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fprintf (stderr, "Key %010llX ", state->K1);
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if (state->K2 != 0) fprintf (stderr, "%016llX ", state->K2);
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if (state->K4 != 0) fprintf (stderr, "%016llX %016llX", state->K3, state->K4);
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fprintf (stderr, "%s ", KNRM);
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}
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if (state->K1 != 0 && fid == 0x68 && so & 0x40 && slot == 1 && state->payload_algidR == 0)
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{
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if (state->K2 != 0) fprintf (stderr, "\n ");
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fprintf (stderr, "%s", KYEL);
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138
src/dmr_le.c
138
src/dmr_le.c
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@ -178,13 +178,24 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
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uint8_t slot = state->currentslot;
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uint8_t sbrc_interleaved[32];
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uint8_t sbrc_return[32];
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uint8_t sbrc_retcrc[32]; //crc significant bits of the return for SB
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memset (sbrc_interleaved, 0, sizeof(sbrc_interleaved));
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memset (sbrc_return, 0, sizeof(sbrc_return));
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memset (sbrc_retcrc, 0, sizeof(sbrc_retcrc));
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uint32_t irr_err = 0;
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uint32_t sbrc_hex = 0;
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uint16_t crc_extracted = 7777;
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uint16_t crc_computed = 9999;
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uint8_t crc_okay = 0;
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uint8_t crc7_okay = 0; //RC
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uint8_t crc3_okay = 0; //TXI
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uint8_t txi = 0; //SEE: https://patents.google.com/patent/US8271009B2
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//NOTE: Any previous mentions to Cap+ in this area may have been in error,
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//The signalling observed here was actually TXI information, not Cap+ Specifically
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//check to see if this a TXI system
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if (slot == 0 && state->dmr_so & 0x20) txi = 1;
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if (slot == 1 && state->dmr_soR & 0x20) txi = 1;
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// 9.3.2 Pre-emption and power control Indicator (PI)
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// 0 - The embedded signalling carries information associated to the same logical channel or the Null embedded message
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@ -198,8 +209,11 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
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//bad emb burst, never set a valid power indicator value (probably 9)
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if (power > 1) goto SBRC_END;
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//arrange the return for proper order for the crc3 check
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for (i = 0; i < 8; i++) sbrc_retcrc[i] = sbrc_return[i+3];
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//RC Channel CRC 7 Mask = 0x7A; CRC bits are used as privacy indicators on
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//Single Voice Burst F (see below), other moto values seem to exist there as well
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//Single Voice Burst F (see below), other moto values seem to exist there as well -- See TXI patent
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if (power == 1) //RC
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{
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crc_extracted = 0;
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@ -209,15 +223,27 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
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crc_extracted = crc_extracted | sbrc_return[i+4];
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}
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crc_extracted = crc_extracted ^ 0x7A;
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crc_computed = crc7((uint8_t *) sbrc_return, 11);
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if (crc_extracted == crc_computed) crc_okay = 1;
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crc_computed = crc7((uint8_t *) sbrc_return, 7);
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if (crc_extracted == crc_computed) crc7_okay = 1;
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}
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else crc_okay = 1; //SB
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else //if (txi == 1) //if TXI -- but TXI systems also carry the non-crc protected ENC identifiers
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{
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crc_extracted = 0;
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for (i = 0; i < 3; i++)
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{
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crc_extracted = crc_extracted << 1;
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crc_extracted = crc_extracted | sbrc_return[i]; //first 3 most significant bits
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}
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crc_computed = crc3((uint8_t *) sbrc_retcrc, 8); //working now seems consistent as well
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if (crc_extracted == crc_computed) crc3_okay = 1;
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// fprintf (stderr, " CRC EXT %02X, CRC CMP %02X", crc_extracted, crc_computed);
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}
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// else //crc_okay = 0; //CRC invalid / not available when is ENC Identifiers (I really hate that)
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for(i = 0; i < 11; i++)
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{
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sbrc_hex = sbrc_hex << 1;
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sbrc_hex |= sbrc_return[i] & 1; //sbrc_return
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sbrc_hex |= sbrc_return[i] & 1;
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}
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if (opts->payload == 1) //hide the sb/rc behind the payload printer, won't be useful to most people
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@ -227,48 +253,76 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
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if (power == 1) fprintf (stderr, " RC: ");
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for(i = 0; i < 11; i++)
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fprintf (stderr, "%d", sbrc_return[i]);
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fprintf (stderr, " - %03X", sbrc_hex);
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fprintf (stderr, "\n");
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fprintf (stderr, " - %03X; ", sbrc_hex);
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fprintf (stderr, "%s", KNRM);
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if (crc_okay == 0)
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{
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fprintf (stderr, "%s", KRED);
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fprintf (stderr, " (CRC ERR)");
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fprintf (stderr, "%s", KNRM);
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fprintf (stderr, " CRC EXT %02X, CRC CMP %02X", crc_extracted, crc_computed);
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}
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}
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uint8_t sbrc_opcode = sbrc_hex;
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// if (crc_okay == 0) //forego this since the crc can vary or not be used at all
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// {
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// fprintf (stderr, "%s", KRED);
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// fprintf (stderr, " (CRC ERR)");
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// fprintf (stderr, "%s", KNRM);
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// fprintf (stderr, " CRC EXT %02X, CRC CMP %02X", crc_extracted, crc_computed);
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// }
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fprintf (stderr, "\n");
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}
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uint8_t sbrc_opcode = sbrc_hex & 0x7; //opcode and alg the same bits, but the alg is present when CRC is bad (I know they are limited on bits, but I hate that idea)
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uint8_t alg = sbrc_hex & 0x7;
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uint8_t key = (sbrc_hex >> 3) & 0xFF;
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uint8_t cap_site = (sbrc_hex >> 4) & 0x7; //signalling on Cap+ when voice errors (non voice VC6 is present)
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uint8_t txi_delay = (sbrc_hex >> 3) & 0x1F; //middle five are the 'delay' value on a TXI system
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if (opts->dmr_le == 1) //this will now require a user to switch it on or off until more testing/figuring can be done
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{
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if (irr_err != 0) ; //fprintf (stderr, "\n %s SLOT %d SB/RC (FEC ERR) %d %s \n", KRED, slot, irr_err, KNRM);
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if (irr_err != 0) fprintf (stderr, "\n %s SLOT %d SB/RC (FEC ERR) %d %s \n", KRED, slot, irr_err, KNRM);
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if (irr_err == 0)
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{
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if (sbrc_hex == 0) ; //NULL
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if (sbrc_hex == 0) ; //NULL, do nothing
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//else if (placeholder for future conditions)
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// {
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// placeholder for future conditions
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// }
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else //Finally have a consistent set-up for this -- spoke too soon, sadly
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else if (crc7_okay == 1)
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{
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//the signalling here is always presents on good voice frames, if errs are [3][2] then its not a VC6 voice frame, but some other 'hidden' frame
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if (slot == 0 && state->errs < 3)
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//do something with the reverse channel information
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}
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//if the call is interruptable (TXI) and the crc3 is okay
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else if (crc3_okay == 1)
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{
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//opcodes -- 0 (NULL), BR Delay (3)
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fprintf (stderr, "\n");
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fprintf (stderr, " TXI Op: %X - ", sbrc_opcode);
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if (sbrc_opcode == 0) fprintf (stderr, " Null; ");
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else if (sbrc_opcode == 3)
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{
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if (txi_delay != 0)
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fprintf (stderr, " BR Delay: %d - %d ms; ", txi_delay, txi_delay * 30); //could also indicate number of superframes until next VC6 pre-emption
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else fprintf (stderr, "BR Delay: Irrelevant / Send at any time;");
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}
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else fprintf (stderr, " Unk; ");
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if (opts->payload == 1) fprintf (stderr, "\n"); //only during payload
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}
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else //all that should be left in this field is the potential ENC identifiers
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{
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if (slot == 0) //may not need the state->errs anymore //&& state->errs < 3
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{
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if (state->dmr_so & 0x40 && key != 0 && state->payload_keyid == 0)
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{
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//if we aren't forcing a particular alg or privacy key set
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if (state->M == 0)
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{
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fprintf (stderr, "\n");
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fprintf (stderr, "%s ", KYEL);
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fprintf (stderr, " Slot 1");
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fprintf (stderr, " DMR LE SB ALG ID: %X KEY ID: %0X", alg + 0x20, key);
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fprintf (stderr, "\n");
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// fprintf (stderr, "\n");
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fprintf (stderr, "%s ", KNRM);
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state->payload_keyid = key;
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@ -278,18 +332,18 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
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}
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}
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//the signalling here is always presents on good voice frames, if errs are [3][2] then its not a VC6 voice frame, but some other 'hidden' frame
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if (slot == 1 && state->errsR < 3)
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if (slot == 1) //may not need the state->errs anymore //&& state->errsR < 3
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{
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if (state->dmr_soR & 0x40 && key != 0 && state->payload_keyidR == 0)
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{
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//if we aren't forcing a particular alg or privacy key set
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if (state->M == 0)
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{
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fprintf (stderr, "%s ", KYEL);
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fprintf (stderr, " Slot 1");
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fprintf (stderr, " DMR LE SB ALG ID: %X KEY ID: %0X", alg + 0x20, key);
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fprintf (stderr, "\n");
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fprintf (stderr, "%s ", KYEL);
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fprintf (stderr, " Slot 2");
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fprintf (stderr, " DMR LE SB ALG ID: %X KEY ID: %0X", alg + 0x20, key);
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// fprintf (stderr, "\n");
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fprintf (stderr, "%s ", KNRM);
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state->payload_keyidR = key;
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@ -324,3 +378,27 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
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}
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uint8_t crc3(uint8_t bits[], unsigned int len)
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{
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uint8_t crc=0;
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unsigned int K = 3;
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//x^3+x+1
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uint8_t poly[4] = {1,1,0,1};
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uint8_t buf[256];
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if (len+K > sizeof(buf)) {
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return 0;
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}
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memset (buf, 0, sizeof(buf));
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for (unsigned int i=0; i<len; i++){
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buf[i] = bits[i];
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}
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for (unsigned int i=0; i<len; i++)
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if (buf[i])
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for (unsigned int j=0; j<K+1; j++)
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buf[i+j] ^= poly[j];
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for (unsigned int i=0; i<K; i++){
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crc = (crc << 1) + buf[len + i];
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}
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return crc;
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}
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12
src/dmr_ms.c
12
src/dmr_ms.c
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@ -87,7 +87,11 @@ void dmrMS (dsd_opts * opts, dsd_state * state)
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//so getDibit doesn't know to invert it before it gets here
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for (j = 0; j < 6; j++) {
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state->dmrburstL = 16;
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state->dmrburstL = 16;
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memset (ambe_fr, 0, sizeof(ambe_fr));
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memset (ambe_fr2, 0, sizeof(ambe_fr2));
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memset (ambe_fr3, 0, sizeof(ambe_fr3));
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for(i = 0; i < 12; i++)
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{
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@ -370,7 +374,11 @@ void dmrMSBootstrap (dsd_opts * opts, dsd_state * state)
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char ambe_fr[4][24];
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char ambe_fr2[4][24];
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char ambe_fr3[4][24];
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char ambe_fr4[4][24]; //shim for crappy tdma direct, need more samples to see if this is really a necessary shim or not
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char ambe_fr4[4][24];
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memset (ambe_fr, 0, sizeof(ambe_fr));
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memset (ambe_fr2, 0, sizeof(ambe_fr2));
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memset (ambe_fr3, 0, sizeof(ambe_fr3));
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//memcpy of ambe_fr for late entry
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char m1[4][24];
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@ -1606,7 +1606,7 @@ getFrameSync (dsd_opts * opts, dsd_state * state)
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if ((opts->errorbars == 1) && (opts->verbose > 1) && (state->carrier == 1))
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{
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fprintf (stderr,"Sync: no sync\n");
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fprintf (stderr,"Press CTRL + C to close.\n");
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// fprintf (stderr,"Press CTRL + C to close.\n");
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}
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noCarrier (opts, state);
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@ -628,7 +628,7 @@ initOpts (dsd_opts * opts)
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opts->dmr_dmrla_n = 0;
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//DMR Late Entry
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opts->dmr_le = 0; //off by default until worked out some more
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opts->dmr_le = 1; //re-enabled again
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//Trunking - Use Group List as Allow List
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opts->trunk_use_allow_list = 0; //disabled by default
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@ -1157,9 +1157,11 @@ usage ()
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printf (" \n");
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printf (" -0 Force RC4 Key over Missing PI header/LE Encryption Identifiers (DMR) \n");
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printf (" \n");
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printf (" -3 Enable DMR Late Entry Encryption Identifiers (VC6 Single Burst) \n");
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printf (" Note: This is experimental and may produce false positives depending on system type, notably Cap+. \n");
|
||||
printf (" Use -0 or -4 options above instead if needed. \n");
|
||||
printf (" -3 Disable DMR Late Entry Encryption Identifiers (VC6 Single Burst) \n");
|
||||
printf (" Note: Disable this if false positives on Voice ENC occur. \n");
|
||||
// printf (" -3 Enable DMR Late Entry Encryption Identifiers (VC6 Single Burst) \n");
|
||||
// printf (" Note: This is experimental and may produce false positives depending on system type, notably TXI. \n");
|
||||
// printf (" Use -0 or -4 options above instead if needed. \n");
|
||||
printf ("\n");
|
||||
printf (" Trunking Options:\n");
|
||||
printf (" -C <file> Import Channel to Frequency Map (channum, freq) from csv file. (Capital C) \n");
|
||||
|
|
@ -1372,7 +1374,7 @@ main (int argc, char **argv)
|
|||
}
|
||||
|
||||
#ifdef AERO_BUILD
|
||||
fprintf (stderr, "Build Version: v2.1 Beta 2\n");
|
||||
fprintf (stderr, "Build Version: v2.1 Beta 3\n");
|
||||
#else
|
||||
fprintf (stderr, "Build Version: %s \n", GIT_TAG);
|
||||
#endif
|
||||
|
|
@ -1424,7 +1426,7 @@ main (int argc, char **argv)
|
|||
|
||||
case '3':
|
||||
opts.dmr_le = 1;
|
||||
fprintf (stderr,"DMR Late Entry Encryption Identifiers Enabled (VC6 Single Burst)\n");
|
||||
fprintf (stderr,"DMR Late Entry Encryption Identifiers Disabled (VC6 Single Burst)\n");
|
||||
break;
|
||||
|
||||
case 'Y': //conventional scanner mode
|
||||
|
|
|
|||
1554
src/dsd_mbe.c
1554
src/dsd_mbe.c
File diff suppressed because it is too large
Load Diff
|
|
@ -2158,7 +2158,7 @@ ncursesPrinter (dsd_opts * opts, dsd_state * state)
|
|||
if (opts->ncurses_compact == 1)
|
||||
{
|
||||
printw ("------------------------------------------------------------------------------\n");
|
||||
printw ("| Digital Speech Decoder: Florida Man Edition - Aero %s \n", "v2.1 Beta 2");
|
||||
printw ("| Digital Speech Decoder: Florida Man Edition - Aero %s \n", "v2.1 Beta 3");
|
||||
printw ("------------------------------------------------------------------------------\n");
|
||||
}
|
||||
#elif LIMAZULUTWEAKS
|
||||
|
|
@ -2194,7 +2194,7 @@ ncursesPrinter (dsd_opts * opts, dsd_state * state)
|
|||
if (i == 4) printw (" MBElib %s", versionstr);
|
||||
#ifdef AERO_BUILD
|
||||
if (i == 5) printw (" %s ", "Aero Build");
|
||||
if (i == 6) printw (" v2.1 Beta 2\n");
|
||||
if (i == 6) printw (" v2.1 Beta 3\n");
|
||||
#elif ZDEV_BUILD
|
||||
if (i == 5) printw (" %s ", "zDEV Build");
|
||||
if (i == 6) printw (" %s \n", GIT_TAG);
|
||||
|
|
|
|||
Loading…
Reference in New Issue