Fix DMR LE Alg/Key on SB;

This commit is contained in:
lwvmobile 2023-06-11 02:22:41 -04:00
parent 8186b62a91
commit 79b4a5e720
2 changed files with 76 additions and 78 deletions

View File

@ -339,8 +339,9 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
//process embedded link control //process embedded link control
fprintf (stderr, "\n"); fprintf (stderr, "\n");
dmr_data_burst_handler(opts, state, (uint8_t *)dummy_bits, 0xEB); dmr_data_burst_handler(opts, state, (uint8_t *)dummy_bits, 0xEB);
//check the single burst/reverse channel opportunity //check the single burst/reverse channel opportunity -- moved
dmr_sbrc (opts, state, power); // dmr_sbrc (opts, state, power);
} }
if (internalslot == 1 && vc2 == 6) if (internalslot == 1 && vc2 == 6)
@ -348,8 +349,9 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
//process embedded link control //process embedded link control
fprintf (stderr, "\n"); fprintf (stderr, "\n");
dmr_data_burst_handler(opts, state, (uint8_t *)dummy_bits, 0xEB); dmr_data_burst_handler(opts, state, (uint8_t *)dummy_bits, 0xEB);
//check the single burst/reverse channel opportunity //check the single burst/reverse channel opportunity -- moved
dmr_sbrc (opts, state, power); // dmr_sbrc (opts, state, power);
} }
if (opts->payload == 1) fprintf (stderr, "\n"); //extra line break necessary here if (opts->payload == 1) fprintf (stderr, "\n"); //extra line break necessary here
@ -381,6 +383,10 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
cach_err = dmr_cach (opts, state, cachdata); cach_err = dmr_cach (opts, state, cachdata);
if (opts->payload == 0) fprintf (stderr, "\n"); if (opts->payload == 0) fprintf (stderr, "\n");
//run sbrc here to look for the late entry key and alg after we observe potential errors in VC6
if (internalslot == 0 && vc1 == 6) dmr_sbrc (opts, state, power);
if (internalslot == 1 && vc2 == 6) dmr_sbrc (opts, state, power);
// run alg refresh after vc6 ambe processing // run alg refresh after vc6 ambe processing
if (internalslot == 0 && vc1 == 6) dmr_alg_refresh (opts, state); if (internalslot == 0 && vc1 == 6) dmr_alg_refresh (opts, state);
if (internalslot == 1 && vc2 == 6) dmr_alg_refresh (opts, state); if (internalslot == 1 && vc2 == 6) dmr_alg_refresh (opts, state);

View File

@ -200,7 +200,6 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
//RC Channel CRC 7 Mask = 0x7A; CRC bits are used as privacy indicators on //RC Channel CRC 7 Mask = 0x7A; CRC bits are used as privacy indicators on
//Single Voice Burst F (see below), other moto values seem to exist there as well //Single Voice Burst F (see below), other moto values seem to exist there as well
//unknown what the other values are (see Cap+ 0x313 and 0x643)
if (power == 1) //RC if (power == 1) //RC
{ {
crc_extracted = 0; crc_extracted = 0;
@ -215,17 +214,19 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
} }
else crc_okay = 1; //SB else crc_okay = 1; //SB
if (opts->payload == 1) //hide the sb/rc behind the payload printer, won't be useful to most people right now for(i = 0; i < 11; i++)
{
sbrc_hex = sbrc_hex << 1;
sbrc_hex |= sbrc_return[i] & 1; //sbrc_return
}
if (opts->payload == 1) //hide the sb/rc behind the payload printer, won't be useful to most people
{ {
fprintf (stderr, "\n %s", KCYN); fprintf (stderr, "\n %s", KCYN);
if (power == 0) fprintf (stderr, " SB: "); if (power == 0) fprintf (stderr, " SB: ");
if (power == 1) fprintf (stderr, " RC: "); if (power == 1) fprintf (stderr, " RC: ");
for(i = 0; i < 11; i++) for(i = 0; i < 11; i++)
{
sbrc_hex = sbrc_hex << 1;
sbrc_hex |= sbrc_return[i] & 1; //sbrc_return
fprintf (stderr, "%d", sbrc_return[i]); fprintf (stderr, "%d", sbrc_return[i]);
}
fprintf (stderr, " - %03X", sbrc_hex); fprintf (stderr, " - %03X", sbrc_hex);
fprintf (stderr, "%s", KNRM); fprintf (stderr, "%s", KNRM);
@ -234,82 +235,73 @@ void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
fprintf (stderr, "%s", KRED); fprintf (stderr, "%s", KRED);
fprintf (stderr, " (CRC ERR)"); fprintf (stderr, " (CRC ERR)");
fprintf (stderr, "%s", KNRM); fprintf (stderr, "%s", KNRM);
if (opts->payload == 1) fprintf (stderr, " CRC EXT %02X, CRC CMP %02X", crc_extracted, crc_computed); fprintf (stderr, " CRC EXT %02X, CRC CMP %02X", crc_extracted, crc_computed);
} }
} }
//Disabling the lower portion until this can be completely ironed out uint8_t sbrc_opcode = sbrc_hex;
uint8_t alg = sbrc_hex & 0x7;
uint8_t key = (sbrc_hex >> 3) & 0xFF;
uint8_t cap_site = (sbrc_hex >> 4) & 0x7; //signalling on Cap+ when voice errors (non voice VC6 is present)
//sbrc_hex value of 0x313 seems to be some Cap+ Thing, if (1 == 1) //opts->payload == 1
//also observed 0x643 on another cap+ system (site id, status? something?) {
// uint8_t sbrc_opcode = sbrc_hex; if (irr_err != 0) ; //fprintf (stderr, "\n %s SLOT %d SB/RC (FEC ERR) %d %s \n", KRED, slot, irr_err, KNRM);
// uint8_t alg = sbrc_hex & 0x7; if (irr_err == 0)
// uint8_t key = (sbrc_hex >> 3) & 0xFF; {
if (sbrc_hex == 0) ; //NULL
//else if (placeholder for future conditions)
// {
// placeholder for future conditions
// }
else //Finally have a consistent set-up for this
{
//the signalling here is always presents on good voice frames, if errs are [3][2] then its not a VC6 voice frame, but some other 'hidden' frame
if (slot == 0 && state->errs < 3)
{
if (state->dmr_so & 0x40 && key != 0 && state->payload_keyid == 0)
{
//if we aren't forcing a particular alg or privacy key set
if (state->M == 0)
{
fprintf (stderr, "%s ", KYEL);
fprintf (stderr, " Slot 1");
fprintf (stderr, " DMR LE SB ALG ID: %X KEY ID: %0X", alg + 0x20, key);
fprintf (stderr, "\n");
fprintf (stderr, "%s ", KNRM);
//this pattern seems to fit the multiple cap+ systems I've observed state->payload_keyid = key;
//test on site '7' to make sure (works on 1 and 4) state->payload_algid = alg + 0x20; //assuming DMRA approved alg values (moto patent)
// uint8_t cap_site = (sbrc_hex >> 4) & 0x7; }
// if (opts->payload == 1) }
// { }
// if (irr_err != 0) fprintf (stderr, "%s (FEC ERR) %d %s", KRED, irr_err, KNRM);
// if (irr_err == 0)
// {
// if (sbrc_hex == 0) ; //NULL
// else if (strcmp (state->dmr_branding_sub, "Cap+ ") == 0)
// {
// //Cap+ Site ID seems to fit here on samples I've seen with the alternate SB signalling, but no idea what signals that info and not the emb alg/key info
// fprintf (stderr, "%s ", KYEL);
// fprintf (stderr, "\n ");
// fprintf (stderr, " Capacity Plus Site %d", cap_site);
// fprintf (stderr, "%s ", KNRM);
// }
// else
// {
// if (slot == 0) //the signalling here is always presents on good voice frames, if errs are [3][2] then its not a VC6 voice frame, but some other 'hidden' frame
// { if (slot == 1 && state->errsR < 3)
// //key and alg only present SOME times, not all, {
// //also, intermixed with other signalling if (state->dmr_soR & 0x40 && key != 0 && state->payload_keyidR == 0)
// //needs more study first! {
// if (state->dmr_so & 0x40 && key != 0 && state->payload_keyid == 0) //if we aren't forcing a particular alg or privacy key set
// { if (state->M == 0)
// if (opts->payload == 1) {
// { fprintf (stderr, "%s ", KYEL);
// fprintf (stderr, "%s ", KYEL); fprintf (stderr, " Slot 1");
// fprintf (stderr, "\n Slot 1"); fprintf (stderr, " DMR LE SB ALG ID: %X KEY ID: %0X", alg + 0x20, key);
// fprintf (stderr, " DMR LE SB ALG ID: %X KEY ID: %0X", alg + 0x20, key); fprintf (stderr, "\n");
// fprintf (stderr, "%s ", KNRM); fprintf (stderr, "%s ", KNRM);
// }
// //needs more study before assignment state->payload_keyidR = key;
// // state->payload_keyid = key; state->payload_algidR = alg + 0x20; //assuming DMRA approved alg values (moto patent)
// // state->payload_algid = alg + 0x20; //assuming DMRA approved alg values (moto patent) }
// }
// }
// if (slot == 1) }
// { }
// if (state->dmr_soR & 0x40 && key != 0 && state->payload_keyidR == 0)
// {
// if (opts->payload == 1)
// {
// fprintf (stderr, "%s ", KYEL);
// fprintf (stderr, "\n Slot 2");
// fprintf (stderr, " DMR LE SB ALG ID: %X KEY ID: %0X", alg + 0x20, key);
// fprintf (stderr, "%s ", KNRM);
// }
// //needs more study before assignment }
// // state->payload_keyidR = key;
// // state->payload_algidR = alg + 0x20; //assuming DMRA approved alg values (moto patent)
// }
// }
// } }
}
// }
// }
SBRC_END: SBRC_END: