DMR SB/RC Additions; Cap+ LC/CSBK; RAS;
This commit is contained in:
lwvmobile
parent
1d49481f2d
commit
ec7d7c24a5
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@ -535,7 +535,7 @@ typedef struct
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uint8_t data_conf_data[2]; //flag for confirmed data blocks per slot
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uint8_t dmr_pdu_sf[2][288]; //unified pdu 'superframe' //[slot][byte]
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uint8_t data_block_crc_valid[2][25]; //flag each individual block as good crc on confirmed data
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char dmr_embedded_signalling[2][6][48]; //embedded signalling 2 slots by 6 vc by 48 bits (replacing TS1SuperFrame.TimeSlotRawVoiceFrame.Sync structure)
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char dmr_embedded_signalling[2][7][48]; //embedded signalling 2 slots by 6 vc by 48 bits (replacing TS1SuperFrame.TimeSlotRawVoiceFrame.Sync structure)
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char dmr_cach_fragment[4][17]; //unsure of size, will need to check/verify
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int dmr_cach_counter; //counter for dmr_cach_fragments 0-3; not sure if needed yet.
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@ -879,7 +879,7 @@ int32_t GetdPmrColorCode(uint8_t ChannelCodeBit[24]);
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void BPTCDeInterleaveDMRData(uint8_t * Input, uint8_t * Output);
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uint32_t BPTC_196x96_Extract_Data(uint8_t InputDeInteleavedData[196], uint8_t DMRDataExtracted[96], uint8_t R[3]);
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uint32_t BPTC_128x77_Extract_Data(uint8_t InputDataMatrix[8][16], uint8_t DMRDataExtracted[77]);
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uint32_t BPTC_16x2_Extract_Data(uint8_t InputInterleavedData[32], uint8_t DMRDataExtracted[32]);
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uint32_t BPTC_16x2_Extract_Data(uint8_t InputInterleavedData[32], uint8_t DMRDataExtracted[32], uint32_t ParityCheckTypeOdd);
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//Reed Solomon (12,9) functions
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void rs_12_9_calc_syndrome(rs_12_9_codeword_t *codeword, rs_12_9_poly_t *syndrome);
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@ -892,6 +892,8 @@ uint16_t ComputeCrcCCITT(uint8_t * DMRData);
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uint16_t ComputeCrcCCITT16d(const uint8_t buf[], uint8_t len);
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uint32_t ComputeAndCorrectFullLinkControlCrc(uint8_t * FullLinkControlDataBytes, uint32_t * CRCComputed, uint32_t CRCMask);
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uint8_t ComputeCrc5Bit(uint8_t * DMRData);
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uint16_t ComputeCrc9Bit(uint8_t * DMRData, uint32_t NbData);
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uint32_t ComputeCrc32Bit(uint8_t * DMRData, uint32_t NbData);
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//new simplified dmr functions
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void dmr_data_burst_handler(dsd_opts * opts, dsd_state * state, uint8_t info[196], uint8_t databurst);
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@ -927,10 +929,14 @@ void dmr_alg_refresh (dsd_opts * opts, dsd_state * state);
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void dmr_late_entry_mi_fragment (dsd_opts * opts, dsd_state * state, uint8_t vc, char ambe_fr[4][24], char ambe_fr2[4][24], char ambe_fr3[4][24]);
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void dmr_late_entry_mi (dsd_opts * opts, dsd_state * state);
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//handle Single Burst (Voice Burst F) or Reverse Channel Signalling
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void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power);
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//DMR FEC/CRC from Boatbod - OP25
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bool Hamming17123(uint8_t* d);
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uint8_t crc8(uint8_t bits[], unsigned int len);
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bool crc8_ok(uint8_t bits[], unsigned int len);
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uint8_t crc7(uint8_t bits[], unsigned int len);
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//LFSR code courtesy of https://github.com/mattames/LFSR/
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void LFSR(dsd_state * state);
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40
src/bptc.c
40
src/bptc.c
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@ -134,6 +134,13 @@ const uint8_t DeInterleaveReverseChannelBptc[32] =
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24, 9, 26, 11, 28, 13, 30, 15
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};
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const uint8_t DeInterleaveReverseChannelBptcPlacement[32] =
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{
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0, 16, 1, 17, 2, 18, 3, 19,
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4, 20, 5, 21, 6, 22, 7, 23,
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8, 24, 9, 25, 10, 26, 11, 27,
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12, 28, 13, 29, 14, 30, 15, 31
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};
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/* Functions ----------------------------------------------------------------*/
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@ -498,33 +505,38 @@ uint32_t BPTC_128x77_Extract_Data(uint8_t InputDataMatrix[8][16], uint8_t DMRDat
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* DMRDataExtracted[11..15] = Hamming data
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* DMRDataExtracted[16..31] = 16 bits of odd parity (to be checked)
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*
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* @param ParityCheckTypeOdd : 0 = Parity to check is even (used in Non-Reverse Channel Single Burst BPTC)
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* 1 = Parity to check is odd (used in Reverse Channel Single Burst BPTC)
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*
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* @return 0 = All is OK
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* Other = Error - Irrecoverable Hamming parity check error number
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*/
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uint32_t BPTC_16x2_Extract_Data(uint8_t InputInterleavedData[32], uint8_t DMRDataExtracted[32])
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uint32_t BPTC_16x2_Extract_Data(uint8_t InputInterleavedData[32], uint8_t DMRDataExtracted[32], uint32_t ParityCheckTypeOdd)
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{
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uint32_t i;
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uint8_t DataMatrix[32];
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uint8_t LineUncorrected[16];
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uint8_t LineCorrected[11];
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uint32_t HammingIrrecoverableErrorNb = 0;
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uint32_t ParityCheckErrorNb = 0;
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uint32_t ParityCheckOddErrorNb = 0;
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uint32_t ParityCheckEvenErrorNb = 0;
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//TODO: make this so we can load either rc interleave, or single burst interleave
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for(i = 0; i < 32; i++)
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{
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DataMatrix[DeInterleaveReverseChannelBptc[i]] = InputInterleavedData[i] & 1;
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DataMatrix[DeInterleaveReverseChannelBptcPlacement[DeInterleaveReverseChannelBptc[i]]] = InputInterleavedData[i] & 1;
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}
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/* Copy the entire input buffer to the output buffer */
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for(i = 0; i < 32; i++)
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{
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DMRDataExtracted[i] = DataMatrix[i];
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DMRDataExtracted[i] = DataMatrix[i] & 1;
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}
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/* Prepare the line to be corrected */
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for(i = 0; i < 16; i++)
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{
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LineUncorrected[i] = DataMatrix[i];
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LineUncorrected[i] = DataMatrix[i] & 1;
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}
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/* Apply Hamming (16,11,4) code correction */
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@ -536,7 +548,7 @@ uint32_t BPTC_16x2_Extract_Data(uint8_t InputInterleavedData[32], uint8_t DMRDat
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/* Copy the corrected content to the output buffer */
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for(i = 0; i < 11; i++)
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{
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DMRDataExtracted[i] = LineCorrected[i];
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DMRDataExtracted[i] = LineCorrected[i] & 1;
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}
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/* Check Parity bits */
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@ -544,14 +556,24 @@ uint32_t BPTC_16x2_Extract_Data(uint8_t InputInterleavedData[32], uint8_t DMRDat
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{
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/* Odd parity ==> If data = 1 then parity = 0
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* If data = 0 then parity = 1 */
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if(DMRDataExtracted[i] == DMRDataExtracted[i + 16]) ParityCheckErrorNb++;
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if((DMRDataExtracted[i] & 1) == (DMRDataExtracted[i + 16] & 1)) ParityCheckOddErrorNb++;
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if((DMRDataExtracted[i] & 1) != (DMRDataExtracted[i + 16] & 1)) ParityCheckEvenErrorNb++;
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}
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//fprintf(stderr, "Hamming ERR=%u ; Parity ERR=%u", HammingIrrecoverableErrorNb, ParityCheckErrorNb);
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//fprintf(stderr, "Hamming ERR=%u ; Parity odd ERR=%u, Parity even ERR=%u, ", HammingIrrecoverableErrorNb, ParityCheckOddErrorNb, ParityCheckEvenErrorNb);
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//fprintf(stderr, "Content =\n");
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//for(i = 0; i < 32; i++)
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//{
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// fprintf(stderr, "%u", DMRDataExtracted[i] & 1);
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// if((i == 15) || (i == 31)) fprintf(stderr, "\n");
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// else fprintf(stderr, "-");
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//}
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/* Return the number of irrecoverable Hamming errors +
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* the number of parity check error */
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return (HammingIrrecoverableErrorNb + ParityCheckErrorNb);
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if(ParityCheckTypeOdd) return (HammingIrrecoverableErrorNb + ParityCheckOddErrorNb);
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else return (HammingIrrecoverableErrorNb + ParityCheckEvenErrorNb);
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} /* End BPTC_16x2_Extract_Data() */
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24
src/dmr_bs.c
24
src/dmr_bs.c
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@ -42,6 +42,11 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
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uint8_t vc1;
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uint8_t vc2;
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//assign as nonsensical numbers
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uint8_t cc = 25;
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uint8_t power = 9; //power and pre-emption indicator
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uint8_t lcss = 9;
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//would be ideal to grab all dibits and break them into bits to pass to new data handler?
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uint8_t dummy_bits[196];
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memset (dummy_bits, 0, sizeof(dummy_bits));
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@ -189,13 +194,13 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
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syncdata[(2*i)+1] = (1 & dibit); // bit 0
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//embedded link control
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if(internalslot == 0 && vc1 > 1 && vc1 < 6) //grab on vc1 values 2-5 B C D and E
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if(internalslot == 0 && vc1 > 1 && vc1 < 7) //grab on vc1 values 2-5 B C D and E
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{
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state->dmr_embedded_signalling[internalslot][vc1-1][i*2] = (1 & (dibit >> 1)); // bit 1
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state->dmr_embedded_signalling[internalslot][vc1-1][i*2+1] = (1 & dibit); // bit 0
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}
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if(internalslot == 1 && vc2 > 1 && vc2 < 6) //grab on vc2 values 2-5 B C D and E
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if(internalslot == 1 && vc2 > 1 && vc2 < 7) //grab on vc2 values 2-5 B C D and E
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{
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state->dmr_embedded_signalling[internalslot][vc2-1][i*2] = (1 & (dibit >> 1)); // bit 1
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state->dmr_embedded_signalling[internalslot][vc2-1][i*2+1] = (1 & dibit); // bit 0
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@ -300,9 +305,9 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
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if ( (strcmp (sync, DMR_BS_VOICE_SYNC) != 0) && emb_ok == 0) goto END; //fprintf (stderr, "EMB BAD? ");
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else if (emb_ok == 1)
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{
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uint8_t cc = ((EmbeddedSignalling[0] << 3) + (EmbeddedSignalling[1] << 2) + (EmbeddedSignalling[2] << 1) + EmbeddedSignalling[3]);
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uint8_t power = EmbeddedSignalling[4];
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uint8_t lcss = ((EmbeddedSignalling[5] << 1) + EmbeddedSignalling[6]);
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cc = ((EmbeddedSignalling[0] << 3) + (EmbeddedSignalling[1] << 2) + (EmbeddedSignalling[2] << 1) + EmbeddedSignalling[3]);
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power = EmbeddedSignalling[4];
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lcss = ((EmbeddedSignalling[5] << 1) + EmbeddedSignalling[6]);
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}
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@ -339,6 +344,8 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
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//process embedded link control
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fprintf (stderr, "\n");
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dmr_data_burst_handler(opts, state, (uint8_t *)dummy_bits, 0xEB);
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//check the single burst/reverse channel opportunity
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dmr_sbrc (opts, state, power);
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}
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if (internalslot == 1 && vc2 == 6)
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@ -346,6 +353,8 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
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//process embedded link control
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fprintf (stderr, "\n");
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dmr_data_burst_handler(opts, state, (uint8_t *)dummy_bits, 0xEB);
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//check the single burst/reverse channel opportunity
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dmr_sbrc (opts, state, power);
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}
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if (opts->payload == 1) fprintf (stderr, "\n"); //extra line break necessary here
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@ -419,6 +428,11 @@ void dmrBS (dsd_opts * opts, dsd_state * state)
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tact_okay = 0;
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emb_ok = 0;
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//reset emb components
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cc = 25;
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power = 9;
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lcss = 9;
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//Extra safeguards to break loop
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// if ( (vc1 > 7 && vc2 > 7) ) goto END;
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if ( (vc1 > 14 || vc2 > 14) ) goto END;
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@ -45,6 +45,7 @@ void dmr_data_burst_handler(dsd_opts * opts, dsd_state * state, uint8_t info[196
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uint8_t R[3];
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uint8_t BPTCReservedBits = 0;
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uint8_t is_ras = 0;
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uint32_t crcmask = 0;
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uint8_t crclen = 0;
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@ -204,7 +205,13 @@ void dmr_data_burst_handler(dsd_opts * opts, dsd_state * state, uint8_t info[196
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IrrecoverableErrors = BPTC_196x96_Extract_Data(BPTCDeInteleavedData, BPTCDmrDataBit, R);
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/* Fill the reserved bit (R(0)-R(2) of the BPTC(196,96) block) */
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BPTCReservedBits = (R[0] & 0x01) | ((R[1] << 1) & 0x02) | ((R[2] << 2) & 0x08);
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BPTCReservedBits = (R[0] & 0x01) | ((R[1] << 1) & 0x02) | ((R[2] << 2) & 0x04);
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//debug print
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//fprintf (stderr, " RAS? %X - %d %d %d", BPTCReservedBits, R[0], R[1], R[2]);
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//set the 'RAS Flag'
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if (BPTCReservedBits != 0) is_ras = 1; //!=0, or == 0x4
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/* Convert the 96 bits BPTC data into 12 bytes */
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k = 0;
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@ -436,6 +443,15 @@ void dmr_data_burst_handler(dsd_opts * opts, dsd_state * state, uint8_t info[196
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}
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if (databurst == 0x05) dmr_block_assembler (opts, state, DMR_PDU, pdu_len, databurst, 2);
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//print whether or not the 'RAS Field' bits are set to indicate RAS enabled (to be verified)
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if (IrrecoverableErrors == 0 && is_ras == 1)
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{
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fprintf (stderr, "%s", KRED);
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fprintf (stderr, " RAS ");
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if (opts->payload == 1) fprintf (stderr, "%X ", BPTCReservedBits);
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fprintf (stderr, "%s", KNRM);
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}
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//print the unified PDU format here, if not slot idle
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if (opts->payload == 1 && databurst != 0x09)
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{
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@ -133,6 +133,7 @@ void dmr_flco (dsd_opts * opts, dsd_state * state, uint8_t lc_bits[], uint32_t C
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// state->lastsrc = 0;
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state->payload_algid = 0;
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state->payload_mi = 0;
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state->payload_keyid = 0;
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}
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if (state->currentslot == 1)
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{
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@ -142,6 +143,7 @@ void dmr_flco (dsd_opts * opts, dsd_state * state, uint8_t lc_bits[], uint32_t C
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// state->lastsrcR = 0;
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state->payload_algidR = 0;
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state->payload_miR = 0;
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state->payload_keyidR = 0;
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}
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}
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@ -164,7 +166,25 @@ void dmr_flco (dsd_opts * opts, dsd_state * state, uint8_t lc_bits[], uint32_t C
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fprintf(stderr, "TGT=%u SRC=%u ", target, source);
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if (opts->payload == 1) fprintf(stderr, "FLCO=0x%02X FID=0x%02X SVC=0x%02X ", flco, fid, so);
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if (flco == 0x3 || flco == 0x7 || flco == 0x23) //UU_V_Ch_Usr, Cap+ Private TXI call (VLC), or Cap+ Private TXI call (EMB)
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//0x04 and 0x05 on a TLC seem to indicate a Cap + Private Call Terminator (perhaps one for each MS)
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//0x07 on a VLC seems to indicate a Cap+ Private Call Header
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//0x23 on the Embedded Voice Burst Sync seems to indicate a Cap+ Private Call in progress
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if (flco == 0x4 || flco == 0x5 || flco == 0x7 || flco == 0x23) //Cap+ Things
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{
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sprintf (state->call_string[slot], " Cap+");
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fprintf (stderr, "Cap+ ");
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if (flco == 0x4)
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{
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strcat (state->call_string[slot], " Grp");
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fprintf (stderr, "Group ");
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}
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else
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{
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strcat (state->call_string[slot], " Pri");
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fprintf (stderr, "Private ");
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}
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}
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else if (flco == 0x3) //UU_V_Ch_Usr
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{
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sprintf (state->call_string[slot], " Private ");
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fprintf (stderr, "Private ");
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@ -208,7 +228,7 @@ void dmr_flco (dsd_opts * opts, dsd_state * state, uint8_t lc_bits[], uint32_t C
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{
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//REMUS! Uncomment Line Below if desired
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// strcat (state->call_string[slot], " RES");
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fprintf(stderr, "Reserved=%d ", (so & 0x30) >> 4);
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fprintf(stderr, "RS%d ", (so & 0x30) >> 4);
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}
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}
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if(so & 0x08)
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@ -255,7 +275,7 @@ void dmr_flco (dsd_opts * opts, dsd_state * state, uint8_t lc_bits[], uint32_t C
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fprintf (stderr, "%s", KRED);
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if (CRCCorrect == 1) ; //CRCCorrect 1 is good, else is bad CRC; no print on good
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else if(IrrecoverableErrors == 0) fprintf(stderr, "(FEC/RAS)");
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else if(IrrecoverableErrors == 0) ; //fprintf(stderr, "(FEC OK)");
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else fprintf(stderr, "(FEC/CRC ERR) ");
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//check Cap+ rest channel info if available and good fec
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148
src/dmr_le.c
148
src/dmr_le.c
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@ -137,3 +137,151 @@ void dmr_alg_reset (dsd_opts * opts, dsd_state * state)
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state->payload_miP = 0;
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}
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//handle Single Burst (Voice Burst F) or Reverse Channel Signalling
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//(Embedded or Dedicated Outbound, not Stand Alone (MS sourced) or Direct Mode)
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//MS Sourced or Direct Mode probably would be handled poorly by the demodulator
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void dmr_sbrc (dsd_opts * opts, dsd_state * state, uint8_t power)
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{
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int i;
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uint8_t slot = state->currentslot;
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uint8_t sbrc_interleaved[32];
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uint8_t sbrc_return[32];
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memset (sbrc_interleaved, 0, sizeof(sbrc_interleaved));
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memset (sbrc_return, 0, sizeof(sbrc_return));
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uint32_t irr_err = 0;
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uint32_t sbrc_hex = 0;
|
||||
uint16_t crc_extracted = 7777;
|
||||
uint16_t crc_computed = 9999;
|
||||
uint8_t crc_okay = 0;
|
||||
|
||||
// 9.3.2 Pre-emption and power control Indicator (PI)
|
||||
// 0 - The embedded signalling carries information associated to the same logical channel or the Null embedded message
|
||||
// 1 - The embedded signalling carries RC information associated to the other logical channel
|
||||
|
||||
for(i = 0; i < 32; i++) sbrc_interleaved[i] = state->dmr_embedded_signalling[slot][5][i + 8];
|
||||
//power == 0 should be single burst
|
||||
if (power == 0) irr_err = BPTC_16x2_Extract_Data(sbrc_interleaved, sbrc_return, 0);
|
||||
//power == 1 should be reverse channel -- still need to check the interleave inside of BPTC
|
||||
if (power == 1) irr_err = BPTC_16x2_Extract_Data(sbrc_interleaved, sbrc_return, 1);
|
||||
//bad emb burst, never set a valid power indicator value (probably 9)
|
||||
if (power > 1) goto SBRC_END;
|
||||
|
||||
//RC Channel CRC 7 Mask = 0x7A; CRC bits are used as privacy indicators on
|
||||
//Single Voice Burst F (see below), other moto values seem to exist there as well
|
||||
//unknown what the other values are (see Cap+ 0x313)
|
||||
if (power == 1) //RC
|
||||
{
|
||||
crc_extracted = 0;
|
||||
for (i = 0; i < 7; i++)
|
||||
{
|
||||
crc_extracted = crc_extracted << 1;
|
||||
crc_extracted = crc_extracted | sbrc_return[i+4];
|
||||
}
|
||||
crc_extracted = crc_extracted ^ 0x7A;
|
||||
crc_computed = crc7((uint8_t *) sbrc_return, 11);
|
||||
if (crc_extracted == crc_computed) crc_okay = 1;
|
||||
if (opts->payload == 1) fprintf (stderr, " CRC EXT %02X, CRC CMP %02X", crc_extracted, crc_computed);
|
||||
}
|
||||
else crc_okay = 1; //SB
|
||||
|
||||
fprintf (stderr, "\n %s", KCYN);
|
||||
if (power == 0) fprintf (stderr, " SB: ");
|
||||
if (power == 1) fprintf (stderr, " RC: ");
|
||||
for(i = 0; i < 11; i++)
|
||||
{
|
||||
sbrc_hex = sbrc_hex << 1;
|
||||
sbrc_hex |= sbrc_return[i] & 1; //sbrc_return
|
||||
fprintf (stderr, "%d", sbrc_return[i]);
|
||||
}
|
||||
fprintf (stderr, " - %03X", sbrc_hex);
|
||||
fprintf (stderr, "%s", KNRM);
|
||||
|
||||
if (crc_okay == 0)
|
||||
{
|
||||
fprintf (stderr, "%s", KRED);
|
||||
fprintf (stderr, " (CRC ERR)");
|
||||
fprintf (stderr, "%s", KNRM);
|
||||
}
|
||||
|
||||
//sbrc_hex value of 0x313 seems to be some Cap+ Thing,
|
||||
//also observed 0x643 on another cap+ system (site id, status? something?)
|
||||
//I've observed it in the Private Cap+ TXI calls as well
|
||||
//there also seems to be a correlation between the SVC bits for TXI (reserved=3) and these extra cap+ values
|
||||
uint8_t sbrc_opcode = sbrc_hex;
|
||||
uint8_t alg = sbrc_hex & 3;
|
||||
uint16_t key = (sbrc_hex >> 3) & 0xFF;
|
||||
|
||||
if (irr_err != 0) fprintf (stderr, "%s (FEC ERR) %d %s", KRED, irr_err, KNRM);
|
||||
if (irr_err == 0)
|
||||
{
|
||||
if (sbrc_hex == 0) ; //NULL
|
||||
else if (sbrc_hex == 0x313)
|
||||
{
|
||||
//Cap+ Thing? Observed On Cap+ Systems
|
||||
// fprintf (stderr, " Cap+ Thing?");
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
if (slot == 0)
|
||||
{
|
||||
//key and alg only present SOME times, not all,
|
||||
//also, intermixed with other signalling
|
||||
//needs more study first!
|
||||
if (state->dmr_so & 0x40 && key != 0 && state->payload_keyid == 0)
|
||||
{
|
||||
if (opts->payload == 1)
|
||||
{
|
||||
fprintf (stderr, "%s ", KYEL);
|
||||
fprintf (stderr, "\n Slot 1");
|
||||
fprintf (stderr, " DMR LE SB ALG ID: %X KEY ID: %0X", alg + 0x20, key);
|
||||
fprintf (stderr, "%s ", KNRM);
|
||||
}
|
||||
|
||||
//needs more study before assignment
|
||||
//state->payload_keyid = key;
|
||||
//state->payload_algid = alg + 0x20; //assuming DMRA approved alg values (moto patent)
|
||||
}
|
||||
}
|
||||
if (slot == 1)
|
||||
{
|
||||
if (state->dmr_soR & 0x40 && key != 0 && state->payload_keyidR == 0)
|
||||
{
|
||||
if (opts->payload == 1)
|
||||
{
|
||||
fprintf (stderr, "%s ", KYEL);
|
||||
fprintf (stderr, "\n Slot 2");
|
||||
fprintf (stderr, " DMR LE SB ALG ID: %X KEY ID: %0X", alg + 0x20, key);
|
||||
fprintf (stderr, "%s ", KNRM);
|
||||
}
|
||||
|
||||
//needs more study before assignment
|
||||
//state->payload_keyidR = key;
|
||||
//state->payload_algidR = alg + 0x20; //assuming DMRA approved alg values (moto patent)
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
SBRC_END:
|
||||
|
||||
//'DSP' output to file -- only RC, or RC and SB?
|
||||
if (power == 1 && opts->use_dsp_output == 1 && sbrc_hex != 0) //if not NULL
|
||||
{
|
||||
FILE * pFile; //file pointer
|
||||
pFile = fopen (opts->dsp_out_file, "a");
|
||||
fprintf (pFile, "\n%d 99 ", slot+1); //'99' is RC designation value
|
||||
int k = 0;
|
||||
for (i = 0; i < 24; i++) //12 bytes, SB or RC
|
||||
{
|
||||
//check to see if k++ starts at zero, or at 1
|
||||
int sbrc_nib = (state->dmr_embedded_signalling[slot][5][k++] << 3) | (state->dmr_embedded_signalling[slot][5][k++] << 2) | (state->dmr_embedded_signalling[slot][5][k++] << 1) | (state->dmr_embedded_signalling[slot][5][k++] << 0);
|
||||
fprintf (pFile, "%X", sbrc_nib);
|
||||
}
|
||||
fclose (pFile);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
|
|
|||
24
src/dmr_ms.c
24
src/dmr_ms.c
|
|
@ -50,6 +50,11 @@ void dmrMS (dsd_opts * opts, dsd_state * state)
|
|||
uint8_t internalslot;
|
||||
uint8_t vc;
|
||||
|
||||
//assign as nonsensical numbers
|
||||
uint8_t cc = 25;
|
||||
uint8_t power = 9; //power and pre-emption indicator
|
||||
uint8_t lcss = 9;
|
||||
|
||||
//dummy bits to pass to dburst for link control
|
||||
uint8_t dummy_bits[196];
|
||||
memset (dummy_bits, 0, sizeof (dummy_bits));
|
||||
|
|
@ -171,7 +176,7 @@ void dmrMS (dsd_opts * opts, dsd_state * state)
|
|||
sync[i] = (dibit | 1) + 48;
|
||||
|
||||
// load the superframe to do embedded signal processing
|
||||
if(vc > 1 && vc < 6) //grab on vc1 values 2-5 B C D and E
|
||||
if(vc > 1) //grab on vc1 values 2-5 B C D and E
|
||||
{
|
||||
state->dmr_embedded_signalling[internalslot][vc-1][i*2] = (1 & (dibit >> 1)); // bit 1
|
||||
state->dmr_embedded_signalling[internalslot][vc-1][i*2+1] = (1 & dibit); // bit 0
|
||||
|
|
@ -180,10 +185,18 @@ void dmrMS (dsd_opts * opts, dsd_state * state)
|
|||
}
|
||||
|
||||
sync[24] = 0;
|
||||
|
||||
for(i = 0; i < 8; i++) EmbeddedSignalling[i] = syncdata[i];
|
||||
for(i = 0; i < 8; i++) EmbeddedSignalling[i + 8] = syncdata[i + 40];
|
||||
|
||||
EmbeddedSignallingOk = -1;
|
||||
if(QR_16_7_6_decode(EmbeddedSignalling))
|
||||
{
|
||||
EmbeddedSignallingOk = 1;
|
||||
cc = ((EmbeddedSignalling[0] << 3) + (EmbeddedSignalling[1] << 2) + (EmbeddedSignalling[2] << 1) + EmbeddedSignalling[3]);
|
||||
power = EmbeddedSignalling[4];
|
||||
lcss = ((EmbeddedSignalling[5] << 1) + EmbeddedSignalling[6]);
|
||||
|
||||
}
|
||||
|
||||
//Continue Second AMBE Frame, 18 after Sync or EmbeddedSignalling
|
||||
|
|
@ -268,6 +281,9 @@ void dmrMS (dsd_opts * opts, dsd_state * state)
|
|||
if (vc == 6)
|
||||
{
|
||||
dmr_data_burst_handler(opts, state, (uint8_t *)dummy_bits, 0xEB);
|
||||
//check the single burst/reverse channel opportunity
|
||||
dmr_sbrc (opts, state, power);
|
||||
|
||||
fprintf (stderr, "\n");
|
||||
dmr_alg_refresh (opts, state);
|
||||
}
|
||||
|
|
@ -282,6 +298,12 @@ void dmrMS (dsd_opts * opts, dsd_state * state)
|
|||
state->last_vc_sync_time = time(NULL);
|
||||
|
||||
vc++;
|
||||
|
||||
//reset emb components
|
||||
cc = 25;
|
||||
power = 9; //power and pre-emption indicator
|
||||
lcss = 9;
|
||||
|
||||
//this is necessary because we need to skip and collect dibits, not just skip them
|
||||
if (vc > 6) goto END;
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
//Original Source - https://github.com/LouisErigHerve/dsd
|
||||
|
||||
//Additional Functions
|
||||
//Hamming17123, crc8, crc8ok functions
|
||||
//Hamming17123, crc7, crc8, crc8ok functions
|
||||
//Original Souce - https://github.com/boatbod/op25
|
||||
|
||||
#include "dsd.h"
|
||||
|
|
@ -121,6 +121,31 @@ bool crc8_ok(uint8_t bits[], unsigned int len)
|
|||
return (crc == crc8(bits,len));
|
||||
}
|
||||
|
||||
uint8_t crc7(uint8_t bits[], unsigned int len)
|
||||
{
|
||||
uint8_t crc=0;
|
||||
unsigned int K = 7;
|
||||
//G7(x) = x7 + x5 + x2 + x + 1 check poly below for correct (dmr rc crc7)
|
||||
uint8_t poly[8] = {1,0,1,0,0,1,1,1}; // crc7 poly
|
||||
uint8_t buf[256];
|
||||
if (len+K > sizeof(buf)) {
|
||||
// fprintf (stderr, "crc8: buffer length %u exceeds maximum %lu\n", len+K, sizeof(buf));
|
||||
return 0;
|
||||
}
|
||||
memset (buf, 0, sizeof(buf));
|
||||
for (unsigned int i=0; i<len; i++){
|
||||
buf[i] = bits[i];
|
||||
}
|
||||
for (unsigned int i=0; i<len; i++)
|
||||
if (buf[i])
|
||||
for (unsigned int j=0; j<K+1; j++)
|
||||
buf[i+j] ^= poly[j];
|
||||
for (unsigned int i=0; i<K; i++){
|
||||
crc = (crc << 1) + buf[len + i];
|
||||
}
|
||||
return crc;
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief : This function compute the CRC-CCITT of the DMR data
|
||||
* by using the polynomial x^16 + x^12 + x^5 + 1
|
||||
|
|
@ -330,3 +355,75 @@ uint32_t ConvertBitIntoBytes(uint8_t * BufferIn, uint32_t BitLength)
|
|||
*
|
||||
* @return The 9 bit CRC
|
||||
*/
|
||||
uint16_t ComputeCrc9Bit(uint8_t * DMRData, uint32_t NbData)
|
||||
{
|
||||
uint32_t i;
|
||||
uint16_t CRC = 0x0000; /* Initialization value = 0x0000 */
|
||||
/* Polynomial x^9 + x^6 + x^4 + x^3 + 1
|
||||
* Normal = 0x059
|
||||
* Reciprocal = 0x134
|
||||
* Reversed reciprocal = 0x12C */
|
||||
uint16_t Polynome = 0x059;
|
||||
for(i = 0; i < NbData; i++)
|
||||
{
|
||||
if(((CRC >> 8) & 1) ^ (DMRData[i] & 1))
|
||||
{
|
||||
CRC = (CRC << 1) ^ Polynome;
|
||||
}
|
||||
else
|
||||
{
|
||||
CRC <<= 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Conserve only the 9 LSBs */
|
||||
CRC &= 0x01FF;
|
||||
|
||||
/* Invert the CRC */
|
||||
CRC ^= 0x01FF;
|
||||
|
||||
/* Return the CRC */
|
||||
return CRC;
|
||||
} /* End ComputeCrc9Bit() */
|
||||
|
||||
/*
|
||||
* @brief : This function compute the CRC-32 of the DMR data
|
||||
* by using the polynomial x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 + x^4 + x^2 + x + 1
|
||||
*
|
||||
* @param Input : A buffer pointer of the DMR data (80 bytes)
|
||||
* Rate 1/2 coded confirmed (10 data octets): 80 bit sequence (80 bytes)
|
||||
* Rate 3/4 coded confirmed (16 data octets): 128 bit sequence (120 bytes)
|
||||
* Rate 1 coded confirmed (22 data octets): 176 bit sequence (176 bytes)
|
||||
*
|
||||
* @param NbData : The number of bit to compute
|
||||
* Rate 1/2 coded confirmed (10 data octets): 80 bit sequence (80 bytes)
|
||||
* Rate 3/4 coded confirmed (16 data octets): 128 bit sequence (120 bytes)
|
||||
* Rate 1 coded confirmed (22 data octets): 176 bit sequence (176 bytes)
|
||||
*
|
||||
* @return The 32 bit CRC
|
||||
*/
|
||||
uint32_t ComputeCrc32Bit(uint8_t * DMRData, uint32_t NbData)
|
||||
{
|
||||
uint32_t i;
|
||||
uint32_t CRC = 0x00000000; /* Initialization value = 0x00000000 */
|
||||
/* Polynomial x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 + x^4 + x^2 + x + 1
|
||||
* Normal = 0x04C11DB7
|
||||
* Reversed = 0xEDB88320
|
||||
* Reciprocal = 0xDB710641
|
||||
* Reversed reciprocal = 0x82608EDB */
|
||||
uint32_t Polynome = 0x04C11DB7;
|
||||
for(i = 0; i < NbData; i++)
|
||||
{
|
||||
if(((CRC >> 31) & 1) ^ (DMRData[i] & 1))
|
||||
{
|
||||
CRC = (CRC << 1) ^ Polynome;
|
||||
}
|
||||
else
|
||||
{
|
||||
CRC <<= 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Return the CRC */
|
||||
return CRC;
|
||||
} /* End ComputeCrc32Bit() */
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ char * FM_banner[9] = {
|
|||
" ██║ ██║ ╚═══██╗██║ ██║ ██╔══╝ ██║╚██╔╝██║██╔══╝ ",
|
||||
" ██████╔╝██████╔╝██████╔╝ ██║ ██║ ╚═╝ ██║███████╗",
|
||||
" ╚═════╝ ╚═════╝ ╚═════╝ ╚═╝ ╚═╝ ╚═╝╚══════╝",
|
||||
" 'Lite' Edition v2.0.0-17-gdcb21f2 Windows 32-bit RC2b "
|
||||
" 'Lite' Edition v2.0.0-18-g67661c2 Windows 32-bit RC2b "
|
||||
};
|
||||
|
||||
int
|
||||
|
|
@ -321,8 +321,8 @@ noCarrier (dsd_opts * opts, dsd_state * state)
|
|||
memset(state->dmr_lrrp_gps, 0, sizeof(state->dmr_lrrp_gps));
|
||||
|
||||
//REMUS! multi-purpose call_string
|
||||
sprintf (state->call_string[0], "%s", " "); //20 spaces
|
||||
sprintf (state->call_string[1], "%s", " "); //20 spaces
|
||||
sprintf (state->call_string[0], "%s", " "); //21 spaces
|
||||
sprintf (state->call_string[1], "%s", " "); //21 spaces
|
||||
|
||||
if (time(NULL) - state->last_cc_sync_time > 30) //thirty seconds of no carrier
|
||||
{
|
||||
|
|
@ -846,8 +846,8 @@ initState (dsd_state * state)
|
|||
memset(state->dmr_lrrp_gps, 0, sizeof(state->dmr_lrrp_gps));
|
||||
|
||||
//REMUS! multi-purpose call_string
|
||||
sprintf (state->call_string[0], "%s", " "); //20 spaces
|
||||
sprintf (state->call_string[1], "%s", " "); //20 spaces
|
||||
sprintf (state->call_string[0], "%s", " "); //21 spaces
|
||||
sprintf (state->call_string[1], "%s", " "); //21 spaces
|
||||
|
||||
//late entry mi fragments
|
||||
memset (state->late_entry_mi_fragment, 0, sizeof (state->late_entry_mi_fragment));
|
||||
|
|
|
|||
|
|
@ -2053,7 +2053,7 @@ ncursesPrinter (dsd_opts * opts, dsd_state * state)
|
|||
if (opts->ncurses_compact == 1)
|
||||
{
|
||||
printw ("------------------------------------------------------------------------------\n");
|
||||
printw ("| Digital Speech Decoder: Florida Man Edition - Win32 %s \n", "v2.0.0-17-gdcb21f2 RC2b");
|
||||
printw ("| Digital Speech Decoder: Florida Man Edition - Win32 %s \n", "v2.0.0-18-g67661c2 RC2b");
|
||||
}
|
||||
if (opts->ncurses_compact == 0)
|
||||
{
|
||||
|
|
@ -2065,7 +2065,7 @@ ncursesPrinter (dsd_opts * opts, dsd_state * state)
|
|||
if (i == 2) printw (" 'q' to Quit ");
|
||||
if (i == 4) printw (" MBElib %s", versionstr);
|
||||
if (i == 5) printw (" %s ", "Win32 RC2b"); //printw (" %s \n", GIT_TAG);
|
||||
if (i == 6) printw (" %s \n", "v2.0.0-17-gdcb21f2"); //printw (" %s \n", GIT_TAG);
|
||||
if (i == 6) printw (" %s \n", "v2.0.0-18-g67661c2"); //printw (" %s \n", GIT_TAG);
|
||||
else printw ("\n");
|
||||
}
|
||||
attroff(COLOR_PAIR(6)); //6
|
||||
|
|
|
|||
Loading…
Reference in New Issue