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Phase 2 Fixes and Tweaks (ISCH and Disc Tap)

This commit is contained in:
lwvmobile 2022-10-01 04:18:22 -04:00
parent 163db6b872
commit f81575335e
5 changed files with 51 additions and 18 deletions
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3
src/dsd_main.c
View File

@ -1565,12 +1565,15 @@ main (int argc, char **argv)
}
else if (optarg[0] == '2')
{
//opts.pulse_digi_rate_in = 96000;
opts.mod_c4fm = 0;
opts.mod_qpsk = 1;
opts.mod_gfsk = 0;
state.rf_mod = 1;
state.samplesPerSymbol = 8;
state.symbolCenter = 3;
// state.samplesPerSymbol = 8*2;
// state.symbolCenter = 3*2;
fprintf (stderr,"Enabling 6000 sps P25 CQPSK (testing only).\n");
}
break;

2
src/dsd_ncurses.c
View File

@ -255,7 +255,7 @@ char *choicesc[] = {
"Save Per Call Decoded WAV (XDMA and NXDN)",
"Setup and Start RTL Input ",
"Retune RTL Dongle ",
"Toggle C4FM/CQPSK (testing)",
"Toggle C4FM/CQPSK (6000 sps)",
"Toggle Audio Mute ",
"Toggle NCurses Compact Mode",
"Toggle NCurses Call History",

12
src/ez.cpp
View File

@ -84,6 +84,12 @@ int ez_rs28_facch (int payload[156], int parity[114])
int ec = -2;
int i, j, k, b;
//init HB
for (i = 0; i < 64; i++)
{
HB[i] = 0;
}
//Erasures for FACCH
Erasures = {0,1,2,3,4,5,6,7,8,54,55,56,57,58,59,60,61,62};
@ -129,6 +135,12 @@ int ez_rs28_sacch (int payload[180], int parity[132])
int ec = -2;
int i, j, k, b;
//init HBS
for (i = 0; i < 64; i++)
{
HBS[i] = 0;
}
//Erasures for SACCH
Erasures = {0,1,2,3,4,57,58,59,60,61,62};

18
src/p25_p2.c
View File

@ -321,8 +321,8 @@ void process_SACCHc (dsd_opts * opts, dsd_state * state)
else
{
fprintf(stderr, " R-S ERR Sc");
if (state->currentslot == 0) state->dmrburstL = 13;
else state->dmrburstR = 13;
// if (state->currentslot == 0) state->dmrburstL = 13;
// else state->dmrburstR = 13;
}
}
@ -371,8 +371,8 @@ void process_SACCHs (dsd_opts * opts, dsd_state * state)
else
{
fprintf(stderr, " R-S ERR Ss");
if (state->currentslot == 0) state->dmrburstL = 13;
else state->dmrburstR = 13;
// if (state->currentslot == 0) state->dmrburstL = 13;
// else state->dmrburstR = 13;
}
}
@ -403,18 +403,28 @@ void process_ISCH (dsd_opts * opts, dsd_state * state)
state->p2_vch_chan_num = chan_num;
//determine where the offset should be by first finding TS 0
//this rule doesn't seem to work properly on LCCH,
//duke always showed a chan 1 loc 0, so offset 12 - frame
if (chan_num == 0 && isch_loc == 0)
{
state->p2_scramble_offset = 11 - framing_counter;
}
//additional rule for odd chan number offset,
//fixes duke, and no issues with other samples
else if (chan_num == 1 && isch_loc == 0)
{
state->p2_scramble_offset = 12 - framing_counter;
}
}
else
{
//if -2(no return value) or -1(fec error)
}
}
// fprintf (stderr, "\n");
}

34
src/p25p2_xcch.c
View File

@ -76,12 +76,12 @@ void process_SACCH_MAC_PDU (dsd_opts * opts, dsd_state * state, int payload[180]
{
//fprintf (stderr, " NULL ");
}
else
else //permit MAC_SIGNAL on CRC ERR for now until demodulator is working better? tests show tons of falsing, so leave on
{
fprintf (stderr, " CRC16 ERR L");
state->p2_is_lcch = 0; //turn flag off here
if (state->currentslot == 0) state->dmrburstL = 14;
else state->dmrburstR = 14;
// if (state->currentslot == 0) state->dmrburstL = 14;
// else state->dmrburstR = 14;
goto END_SMAC;
}
}
@ -93,11 +93,18 @@ void process_SACCH_MAC_PDU (dsd_opts * opts, dsd_state * state, int payload[180]
if (opcode == 0x0)
{
fprintf (stderr, " MAC_SIGNAL ");
//warn user instead of failing
if (err != 0)
{
fprintf (stderr, "%s", KRED);
fprintf (stderr, "CRC16 ERR ");
}
fprintf (stderr, "%s", KMAG);
process_MAC_VPDU(opts, state, 1, SMAC);
fprintf (stderr, "%s", KNRM);
}
if (opcode == 0x1)
//do not permit MAC_PTT with CRC errs, help prevent false positives on calls
if (opcode == 0x1 && err == 0)
{
fprintf (stderr, " MAC_PTT ");
fprintf (stderr, "%s", KGRN);
@ -170,18 +177,19 @@ void process_SACCH_MAC_PDU (dsd_opts * opts, dsd_state * state, int payload[180]
}
fprintf (stderr, "%s", KNRM);
}
if (opcode == 0x2)
//do not permit MAC_PTT_END with CRC errs, help prevent false positives on calls
if (opcode == 0x2 && err == 0)
{
fprintf (stderr, " MAC_END_PTT ");
fprintf (stderr, "%s", KRED);
//remember, slots are inverted here, so set the opposite ones
if (state->currentslot == 1)
{
//reset fourv_counter and dropbyte on PTT END
state->fourv_counter[0] = 0;
state->dmrburstL = 23;
state->payload_algid = 0; //zero this out as well
state->payload_keyid = 0; //and this
state->payload_algid = 0;
state->payload_keyid = 0;
fprintf (stderr, "\n VCH 0 - ");
fprintf (stderr, "TG %d ", state->lasttg);
@ -193,7 +201,7 @@ void process_SACCH_MAC_PDU (dsd_opts * opts, dsd_state * state, int payload[180]
}
if (state->currentslot == 0)
{
//reset fourv_counter and dropbyte on PTT END
state->fourv_counter[1] = 0;
state->dmrburstR = 23;
state->payload_algidR = 0;
@ -308,7 +316,7 @@ void process_FACCH_MAC_PDU (dsd_opts * opts, dsd_state * state, int payload[156]
// fprintf (stderr, "%s", KNRM);
// }
if (opcode == 0x1)
if (opcode == 0x1 && err == 0)
{
fprintf (stderr, " MAC_PTT ");
@ -381,13 +389,13 @@ void process_FACCH_MAC_PDU (dsd_opts * opts, dsd_state * state, int payload[156]
fprintf (stderr, "%s", KNRM);
}
if (opcode == 0x2)
if (opcode == 0x2 && err == 0)
{
fprintf (stderr, " MAC_END_PTT ");
fprintf (stderr, "%s", KRED);
if (state->currentslot == 0)
{
//reset fourv_counter and dropbyte on PTT END
state->fourv_counter[0] = 0;
state->dmrburstL = 23;
state->payload_algid = 0; //zero this out as well
@ -403,7 +411,7 @@ void process_FACCH_MAC_PDU (dsd_opts * opts, dsd_state * state, int payload[156]
}
if (state->currentslot == 1)
{
//reset fourv_counter and dropbyte on PTT END
state->fourv_counter[1] = 0;
state->dmrburstR = 23;
state->payload_algidR = 0; //zero this out as well