394 lines
13 KiB
C
394 lines
13 KiB
C
/*
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* Copyright (C) 2010 DSD Author
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* GPG Key ID: 0x3F1D7FD0 (74EF 430D F7F2 0A48 FCE6 F630 FAA2 635D 3F1D 7FD0)
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH
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* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT,
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* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
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* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "dsd.h"
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#include "p25p1_const.h"
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#include "p25p1_ldu.h"
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#include "p25p1_check_ldu.h"
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#include "p25p1_hdu.h"
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void
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processLDU2 (dsd_opts * opts, dsd_state * state)
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{
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// extracts IMBE frames from LDU frame
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int i;
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char mi[73], algid[9], kid[17];
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char lsd1[9], lsd2[9];
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int algidhex, kidhex;
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unsigned long long int mihex1, mihex2, mihex3;
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int status_count;
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char hex_data[16][6]; // Data in hex-words (6 bit words). A total of 16 hex words.
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char hex_parity[8][6]; // Parity of the data, again in hex-word format. A total of 12 parity hex words.
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int irrecoverable_errors;
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AnalogSignal analog_signal_array[16*(3+2)+8*(3+2)];
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int analog_signal_index;
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analog_signal_index = 0;
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// we skip the status dibits that occur every 36 symbols
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// the first IMBE frame starts 14 symbols before next status
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// so we start counter at 36-14-1 = 21
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status_count = 21;
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state->p25vc = 9;
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if (opts->errorbars == 1)
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{
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//fprintf (stderr, "e:");
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}
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// IMBE 1
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#ifdef TRACE_DSD
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state->debug_prefix_2 = '0';
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#endif
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process_IMBE (opts, state, &status_count);
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// IMBE 2
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#ifdef TRACE_DSD
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state->debug_prefix_2 = '1';
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#endif
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process_IMBE (opts, state, &status_count);
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// Read data after IMBE 2
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read_and_correct_hex_word (opts, state, &(hex_data[15][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[14][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[13][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[12][0]), &status_count, analog_signal_array, &analog_signal_index);
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analog_signal_array[0*5].sequence_broken = 1;
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// IMBE 3
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#ifdef TRACE_DSD
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state->debug_prefix_2 = '2';
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#endif
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process_IMBE (opts, state, &status_count);
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// Read data after IMBE 3
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read_and_correct_hex_word (opts, state, &(hex_data[11][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[10][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[ 9][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[ 8][0]), &status_count, analog_signal_array, &analog_signal_index);
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analog_signal_array[4*5].sequence_broken = 1;
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// IMBE 4
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#ifdef TRACE_DSD
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state->debug_prefix_2 = '3';
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#endif
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process_IMBE (opts, state, &status_count);
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// Read data after IMBE 4
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read_and_correct_hex_word (opts, state, &(hex_data[ 7][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[ 6][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[ 5][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[ 4][0]), &status_count, analog_signal_array, &analog_signal_index);
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analog_signal_array[8*5].sequence_broken = 1;
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// IMBE 5
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#ifdef TRACE_DSD
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state->debug_prefix_2 = '4';
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#endif
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process_IMBE (opts, state, &status_count);
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// Read data after IMBE 5
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read_and_correct_hex_word (opts, state, &(hex_data[ 3][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[ 2][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[ 1][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_data[ 0][0]), &status_count, analog_signal_array, &analog_signal_index);
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analog_signal_array[12*5].sequence_broken = 1;
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// IMBE 6
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#ifdef TRACE_DSD
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state->debug_prefix_2 = '5';
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#endif
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process_IMBE (opts, state, &status_count);
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// Read data after IMBE 6
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read_and_correct_hex_word (opts, state, &(hex_parity[ 7][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_parity[ 6][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_parity[ 5][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_parity[ 4][0]), &status_count, analog_signal_array, &analog_signal_index);
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analog_signal_array[16*5].sequence_broken = 1;
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// IMBE 7
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#ifdef TRACE_DSD
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state->debug_prefix_2 = '6';
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#endif
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process_IMBE (opts, state, &status_count);
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// Read data after IMBE 7
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read_and_correct_hex_word (opts, state, &(hex_parity[ 3][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_parity[ 2][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_parity[ 1][0]), &status_count, analog_signal_array, &analog_signal_index);
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read_and_correct_hex_word (opts, state, &(hex_parity[ 0][0]), &status_count, analog_signal_array, &analog_signal_index);
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analog_signal_array[20*5].sequence_broken = 1;
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// IMBE 8
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#ifdef TRACE_DSD
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state->debug_prefix_2 = '7';
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#endif
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process_IMBE (opts, state, &status_count);
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// Read data after IMBE 8: LSD (low speed data)
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{
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char lsd[8];
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char cyclic_parity[8];
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for (i=0; i<=6; i+=2)
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{
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read_dibit(opts, state, lsd+i, &status_count, NULL, NULL);
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}
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for (i=0; i<=6; i+=2)
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{
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read_dibit(opts, state, cyclic_parity+i, &status_count, NULL, NULL);
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}
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for (i=0; i<8; i++)
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{
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lsd1[i] = lsd[i] + '0';
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}
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for (i=0; i<=6; i+=2)
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{
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read_dibit(opts, state, lsd+i, &status_count, NULL, NULL);
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}
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for (i=0; i<=6; i+=2)
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{
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read_dibit(opts, state, cyclic_parity+i, &status_count, NULL, NULL);
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}
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for (i=0; i<8; i++)
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{
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lsd2[i] = lsd[i] + '0';
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}
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// TODO: error correction of the LSD bytes...
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// TODO: do something useful with the LSD bytes...
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}
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// IMBE 9
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#ifdef TRACE_DSD
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state->debug_prefix_2 = '8';
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#endif
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process_IMBE (opts, state, &status_count);
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//set vc counter to 0
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state->p25vc = 0;
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if (opts->errorbars == 1)
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{
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fprintf (stderr, "\n");
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}
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if (opts->p25status == 1)
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{
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fprintf (stderr, "lsd1: %s lsd2: %s\n", lsd1, lsd2);
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}
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// trailing status symbol
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{
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int status;
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status = getDibit (opts, state) + '0';
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// TODO: do something useful with the status bits...
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}
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// Error correct the hex_data using Reed-Solomon hex_parity
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irrecoverable_errors = check_and_fix_reedsolomon_24_16_9((char*)hex_data, (char*)hex_parity);
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if (irrecoverable_errors == 1)
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{
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state->debug_header_critical_errors++;
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// We can correct (9-1)/2 = 4 errors. If we failed, it means that there were more than 4 errors in
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// these 12+12 words. But take into account that each hex word was already error corrected with
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// Hamming(10,6,3), which can correct 1 bits on each sequence of (6+4) bits. We could say that there
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// were 5 errors of 2 bits.
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update_error_stats(&state->p25_heuristics, 12*6+12*6, 5*2);
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}
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else
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{
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// Same comments as in processHDU. See there.
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char fixed_parity[8*6];
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// Correct the dibits that we read according with hex_data values
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correct_hamming_dibits((char*)hex_data, 16, analog_signal_array);
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// Generate again the Reed-Solomon parity
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encode_reedsolomon_24_16_9((char*)hex_data, fixed_parity);
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// Correct the dibits that we read according with the fixed parity values
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correct_hamming_dibits(fixed_parity, 8, analog_signal_array+16*(3+2));
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// Once corrected, contribute this information to the heuristics module
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contribute_to_heuristics(state->rf_mod, &(state->p25_heuristics), analog_signal_array, 16*(3+2)+8*(3+2));
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}
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#ifdef HEURISTICS_DEBUG
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fprintf (stderr, "(audio errors, header errors, critical header errors) (%i,%i,%i)\n",
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state->debug_audio_errors, state->debug_header_errors, state->debug_header_critical_errors);
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#endif
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// Now put the corrected data into the DSD structures
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mi[72] = 0;
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algid[8] = 0;
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kid[16] = 0;
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lsd1[8] = 0;
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lsd2[8] = 0;
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mi[ 0] = hex_data[15][0] + '0';
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mi[ 1] = hex_data[15][1] + '0';
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mi[ 2] = hex_data[15][2] + '0';
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mi[ 3] = hex_data[15][3] + '0';
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mi[ 4] = hex_data[15][4] + '0';
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mi[ 5] = hex_data[15][5] + '0';
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mi[ 6] = hex_data[14][0] + '0';
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mi[ 7] = hex_data[14][1] + '0';
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mi[ 8] = hex_data[14][2] + '0';
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mi[ 9] = hex_data[14][3] + '0';
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mi[10] = hex_data[14][4] + '0';
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mi[11] = hex_data[14][5] + '0';
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mi[12] = hex_data[13][0] + '0';
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mi[13] = hex_data[13][1] + '0';
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mi[14] = hex_data[13][2] + '0';
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mi[15] = hex_data[13][3] + '0';
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mi[16] = hex_data[13][4] + '0';
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mi[17] = hex_data[13][5] + '0';
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mi[18] = hex_data[12][0] + '0';
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mi[19] = hex_data[12][1] + '0';
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mi[20] = hex_data[12][2] + '0';
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mi[21] = hex_data[12][3] + '0';
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mi[22] = hex_data[12][4] + '0';
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mi[23] = hex_data[12][5] + '0';
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mi[24] = hex_data[11][0] + '0';
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mi[25] = hex_data[11][1] + '0';
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mi[26] = hex_data[11][2] + '0';
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mi[27] = hex_data[11][3] + '0';
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mi[28] = hex_data[11][4] + '0';
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mi[29] = hex_data[11][5] + '0';
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mi[30] = hex_data[10][0] + '0';
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mi[31] = hex_data[10][1] + '0';
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mi[32] = hex_data[10][2] + '0';
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mi[33] = hex_data[10][3] + '0';
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mi[34] = hex_data[10][4] + '0';
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mi[35] = hex_data[10][5] + '0';
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mi[36] = hex_data[ 9][0] + '0';
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mi[37] = hex_data[ 9][1] + '0';
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mi[38] = hex_data[ 9][2] + '0';
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mi[39] = hex_data[ 9][3] + '0';
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mi[40] = hex_data[ 9][4] + '0';
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mi[41] = hex_data[ 9][5] + '0';
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mi[42] = hex_data[ 8][0] + '0';
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mi[43] = hex_data[ 8][1] + '0';
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mi[44] = hex_data[ 8][2] + '0';
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mi[45] = hex_data[ 8][3] + '0';
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mi[46] = hex_data[ 8][4] + '0';
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mi[47] = hex_data[ 8][5] + '0';
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mi[48] = hex_data[ 7][0] + '0';
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mi[49] = hex_data[ 7][1] + '0';
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mi[50] = hex_data[ 7][2] + '0';
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mi[51] = hex_data[ 7][3] + '0';
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mi[52] = hex_data[ 7][4] + '0';
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mi[53] = hex_data[ 7][5] + '0';
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mi[54] = hex_data[ 6][0] + '0';
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mi[55] = hex_data[ 6][1] + '0';
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mi[56] = hex_data[ 6][2] + '0';
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mi[57] = hex_data[ 6][3] + '0';
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mi[58] = hex_data[ 6][4] + '0';
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mi[59] = hex_data[ 6][5] + '0';
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mi[60] = hex_data[ 5][0] + '0';
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mi[61] = hex_data[ 5][1] + '0';
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mi[62] = hex_data[ 5][2] + '0';
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mi[63] = hex_data[ 5][3] + '0';
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mi[64] = hex_data[ 5][4] + '0';
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mi[65] = hex_data[ 5][5] + '0';
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mi[66] = hex_data[ 4][0] + '0';
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mi[67] = hex_data[ 4][1] + '0';
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mi[68] = hex_data[ 4][2] + '0';
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mi[69] = hex_data[ 4][3] + '0';
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mi[70] = hex_data[ 4][4] + '0';
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mi[71] = hex_data[ 4][5] + '0';
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algid[0] = hex_data[ 3][0] + '0';
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algid[1] = hex_data[ 3][1] + '0';
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algid[2] = hex_data[ 3][2] + '0';
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algid[3] = hex_data[ 3][3] + '0';
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algid[4] = hex_data[ 3][4] + '0';
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algid[5] = hex_data[ 3][5] + '0';
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algid[6] = hex_data[ 2][0] + '0';
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algid[7] = hex_data[ 2][1] + '0';
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kid[0] = hex_data[ 2][2] + '0';
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kid[1] = hex_data[ 2][3] + '0';
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kid[2] = hex_data[ 2][4] + '0';
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kid[3] = hex_data[ 2][5] + '0';
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kid[4] = hex_data[ 1][0] + '0';
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kid[5] = hex_data[ 1][1] + '0';
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kid[6] = hex_data[ 1][2] + '0';
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kid[7] = hex_data[ 1][3] + '0';
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kid[8] = hex_data[ 1][4] + '0';
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kid[9] = hex_data[ 1][5] + '0';
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kid[10] = hex_data[ 0][0] + '0';
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kid[11] = hex_data[ 0][1] + '0';
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kid[12] = hex_data[ 0][2] + '0';
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kid[13] = hex_data[ 0][3] + '0';
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kid[14] = hex_data[ 0][4] + '0';
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kid[15] = hex_data[ 0][5] + '0';
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algidhex = strtol (algid, NULL, 2);
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kidhex = strtol (kid, NULL, 2);
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mihex1 = (unsigned long long int)ConvertBitIntoBytes(&mi[0], 32);
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mihex2 = (unsigned long long int)ConvertBitIntoBytes(&mi[32], 32);
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mihex3 = (unsigned long long int)ConvertBitIntoBytes(&mi[64], 8);
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if (irrecoverable_errors == 0)
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{
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fprintf (stderr, "%s", KYEL);
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fprintf (stderr, " LDU2 ALG ID: 0x%02X KEY ID: 0x%02X MI: 0x%08llX%08llX%02llX", algidhex, kidhex, mihex1, mihex2, mihex3);
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fprintf (stderr, "%s", KNRM);
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state->payload_algid = algidhex;
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state->payload_keyid = kidhex;
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//only use 64 MSB, trailing 8 bits aren't used, so no mihex3
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state->payload_miP = (mihex1 << 32) | (mihex2);
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if (state->payload_algid != 0x80 && state->payload_algid != 0x0) //print on payload == 1
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{
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fprintf (stderr, "%s", KRED);
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fprintf (stderr, " ENC");
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fprintf (stderr, "%s", KNRM);
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}
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fprintf (stderr, "\n");
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}
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else
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{
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fprintf (stderr, "%s", KRED);
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fprintf (stderr, " LDU2 FEC ERR \n");
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fprintf (stderr, "%s", KNRM);
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}
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}
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