From 61afc7962e454215499914be265102817e0f19d5 Mon Sep 17 00:00:00 2001
From: F5OEO <evaristec@gmail.com>
Date: Tue, 27 Feb 2018 12:17:02 +0000
Subject: [PATCH] First test of fm dma - Not tested

---
 src/fmdmasync.cpp | 46 +++++++++++++++++++++++++++++++++++++++++++++-
 src/fmdmasync.h   |  2 ++
 src/gpio.cpp      |  2 +-
 src/v2rpitx.cpp   | 23 +++++++++++++++++++----
 4 files changed, 67 insertions(+), 6 deletions(-)

diff --git a/src/fmdmasync.cpp b/src/fmdmasync.cpp
index fcb4891..921194f 100644
--- a/src/fmdmasync.cpp
+++ b/src/fmdmasync.cpp
@@ -1,12 +1,56 @@
 #include "stdio.h"
 #include "fmdmasync.h"
+#include "gpio.h" //for definition of registers
 
 fmdmasync::fmdmasync(int Channel,uint32_t FifoSize):dma(Channel,FifoSize*2,FifoSize)
 {
-	
+	SetDmaAlgo();
+	FillMemory(12,1472);
 }
 
 fmdmasync::~fmdmasync()
 {
 }
 
+void fmdmasync::SetDmaAlgo()
+{
+			dma_cb_t *cbp = cbarray;
+			for (uint32_t samplecnt = 0; samplecnt < cbsize/2; samplecnt++) { //cbsize/2 because we have 2 CB by sample
+			
+		
+			// Write a frequency sample
+
+			cbp->info = BCM2708_DMA_NO_WIDE_BURSTS /* BCM2708_DMA_WAIT_RESP |BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(5)*/;
+			cbp->src = mem_virt_to_phys(&usermem[samplecnt]);
+			cbp->dst = 0x7E000000 | GPCLK_DIV | CLK_BASE ;
+			cbp->length = 4;
+			cbp->stride = 0;
+			cbp->next = mem_virt_to_phys(cbp + 1);
+			//printf("cbp : sample %x src %x dest %x next %x\n",ctl->sample + i,cbp->src,cbp->dst,cbp->next);
+			cbp++;
+			
+					
+			// Delay
+			
+			cbp->info =  BCM2708_DMA_SRC_IGNOR  |/* BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP |*/ BCM2708_DMA_D_DREQ  | BCM2708_DMA_PER_MAP(2);
+			cbp->src = mem_virt_to_phys(usermem); // Data is not important as we use it only to feed the PWM
+			cbp->dst = 0x7E000000 | PWM_FIFO | PWM_BASE ;
+			cbp->length = 4;
+			cbp->stride = 0;
+			cbp->next = mem_virt_to_phys(cbp + 1);
+			cbp++;
+		}
+					
+		cbp--;
+		cbp->next = mem_virt_to_phys(cbarray); // We loop to the first CB
+}
+
+void fmdmasync::FillMemory(uint32_t FreqDivider,uint32_t FreqFractionnal)
+{
+	
+	for (uint32_t samplecnt = 0; samplecnt < usermemsize; samplecnt++)
+	{
+		usermem[samplecnt]=0x5A000000 | ((FreqDivider)<<12) | FreqFractionnal;
+		FreqFractionnal=(FreqFractionnal+1)%4096;
+	}
+}
diff --git a/src/fmdmasync.h b/src/fmdmasync.h
index a56e082..6d4117a 100644
--- a/src/fmdmasync.h
+++ b/src/fmdmasync.h
@@ -9,6 +9,8 @@ class fmdmasync:public dma
 	public:
 	fmdmasync(int Channel,uint32_t FifoSize);
 	~fmdmasync();
+	void SetDmaAlgo();
+	void FillMemory(uint32_t FreqDivider,uint32_t FreqFractionnal);
 }; 
 
 #endif
diff --git a/src/gpio.cpp b/src/gpio.cpp
index 3a49279..47eba0d 100644
--- a/src/gpio.cpp
+++ b/src/gpio.cpp
@@ -100,7 +100,7 @@ int clkgpio::SetFrequency(uint64_t Frequency)
 	uint32_t FreqDivider=(uint32_t)Freqresult;
 	uint32_t FreqFractionnal=(uint32_t) (4096*(Freqresult-(double)FreqDivider));
 	if((FreqDivider>4096)||(FreqDivider<2)) fprintf(stderr,"Frequency out of range\n");
-	//printf("DIV/FRAC %u/%u \n",FreqDivider,FreqFractionnal);
+	printf("DIV/FRAC %u/%u \n",FreqDivider,FreqFractionnal);
 
 	gpioreg[GPCLK_DIV] = 0x5A000000 | ((FreqDivider)<<12) | FreqFractionnal;
 	//gpioreg[GPCLK_CNTL]= 0x5A000000 | (Mash << 9) | pllnumber |4  ; //4 is START CLK
diff --git a/src/v2rpitx.cpp b/src/v2rpitx.cpp
index 54ab22a..7b9034b 100644
--- a/src/v2rpitx.cpp
+++ b/src/v2rpitx.cpp
@@ -1,6 +1,7 @@
 #include <unistd.h>
 #include "dma.h"
 #include "gpio.h"
+#include "fmdmasync.h"
 
 int main(int argc, char* argv[])
 {
@@ -10,9 +11,23 @@ int main(int argc, char* argv[])
 	
 	generalgpio generalio;
 	generalio.enableclk();
-	for(int i=0;i<100;i++)
+
+	pwmgpio pwm;
+	pwm.SetPllNumber(clk_plld,1);
+	pwm.SetFrequency(1000000);
+	pwm.SetMode(0);
+	clk.SetFrequency(89000000);
+
+	fmdmasync fmtest(14,4000);
+	fmtest.start();
+	sleep(20);
+	fmtest.stop();
+	/*
 	{
-		usleep(40000);
-		clk.SetFrequency(89000000+i*40);
-	}
+		for(int i=0;i<10000;i++)
+		{
+			usleep(50);
+			clk.SetFrequency(89000000+(i%2)*200000);
+		}
+	}*/
 }