mirror of https://github.com/F5OEO/rpitx
130 lines
4.0 KiB
C++
130 lines
4.0 KiB
C++
// Inspired by https://github.com/SaucySoliton/PiFmRds/blob/master/src/pi_fm_rds.c
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#include "stdio.h"
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#include "ngfmdmasync.h"
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ngfmdmasync::ngfmdmasync(uint64_t TuneFrequency,uint32_t SampleRate,int Channel,uint32_t FifoSize):bufferdma(Channel,FifoSize,2,1)
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{
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tunefreq=TuneFrequency;
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clkgpio::SetAdvancedPllMode(true);
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clkgpio::SetCenterFrequency(TuneFrequency); // Write Mult Int and Frac : FixMe carrier is already there
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/*
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double FloatMult=((double)TuneFrequency)/(double)(XOSC_FREQUENCY);
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uint32_t freqctl = FloatMult*((double)(1<<20)) ;
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int IntMultiply= freqctl>>20; // Need to be calculated to have a center frequency
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freqctl&=0xFFFFF; // Fractionnal is 20bits
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//fprintf(stderr,"freqctl=%d\n", freqctl);
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uint32_t FracMultiply=freqctl&0xFFFFC; // Check if last 2 bits are really there
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clkgpio::gpioreg[PLLA_CTRL] = (0x5a<<24) | (0x21<<12) | IntMultiply;
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SetClkDivFrac(4,0); // CLK is not divided for now !
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*/
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pwmgpio::SetPllNumber(clk_osc,1);
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pwmgpio::SetFrequency(SampleRate);
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pwmgpio::SetMode(0);
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SetDmaAlgo();
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//FillMemory(IntMultiply,FracMultiply);
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// Note : Spurious are at +/-(19.2MHZ/2^20)*Div*N : (N=1,2,3...) So we need to have a big div to spurious away BUT
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// Spurious are ALSO at +/-(19.2MHZ/2^20)*(2^20-Div)*N
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// Max spurious avoid is to be in the center ! Theory shoud be that spurious are set away at 19.2/2= 9.6Mhz ! But need to get account of div of PLLClock
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}
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ngfmdmasync::~ngfmdmasync()
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{
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}
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void ngfmdmasync::SetPhase(bool inversed)
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{
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clkgpio::SetPhase(inversed);
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}
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void ngfmdmasync::SetDmaAlgo()
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{
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dma_cb_t *cbp = cbarray;
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for (uint32_t samplecnt = 0; samplecnt < buffersize; samplecnt++)
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{
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// Write INT Mult
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/*
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[samplecnt*registerbysample+1]);
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cbp->dst = 0x7E000000 + (PLLA_CTRL<<2) + CLK_BASE ;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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//fprintf(stderr,"cbp : sample %x src %x dest %x next %x\n",samplecnt,cbp->src,cbp->dst,cbp->next);
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cbp++;
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*/
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// Write a frequency sample
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cbp->info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP ;
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cbp->src = mem_virt_to_phys(&usermem[samplecnt*registerbysample]);
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cbp->dst = 0x7E000000 + (PLLA_FRAC<<2) + CLK_BASE ;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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//fprintf(stderr,"cbp : sample %x src %x dest %x next %x\n",samplecnt,cbp->src,cbp->dst,cbp->next);
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cbp++;
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// Delay
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cbp->info = /*BCM2708_DMA_SRC_IGNOR | */BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(DREQ_PWM);
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cbp->src = mem_virt_to_phys(cbarray); // Data is not important as we use it only to feed the PWM
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cbp->dst = 0x7E000000 + (PWM_FIFO<<2) + PWM_BASE ;
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cbp->length = 4;
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cbp->stride = 0;
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cbp->next = mem_virt_to_phys(cbp + 1);
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//fprintf(stderr,"cbp : sample %x src %x dest %x next %x\n",samplecnt,cbp->src,cbp->dst,cbp->next);
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cbp++;
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}
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cbp--;
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cbp->next = mem_virt_to_phys(cbarray); // We loop to the first CB
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//fprintf(stderr,"Last cbp : src %x dest %x next %x\n",cbp->src,cbp->dst,cbp->next);
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}
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void ngfmdmasync::SetFrequencySample(uint32_t Index,int Frequency)
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{
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sampletab[Index]=(0x5A<<24)|GetMasterFrac(Frequency);
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//fprintf(stderr,"Frac=%d\n",GetMasterFrac(Frequency));
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PushSample(Index);
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}
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void ngfmdmasync::FillMemory(uint32_t MultInt,uint32_t FirstFrac)
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{
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//if(FirstFrac<usermemsize) FirstFrac=usermemsize;
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uint32_t tempmul=MultInt;
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for (uint32_t samplecnt = 0; samplecnt < usermemsize/2; samplecnt++)
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{
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//uint32_t Frac=(FirstFrac+samplecnt*((samplecnt%2==0)?1:-1))&0xFFFFF;
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uint32_t Frac=(FirstFrac+samplecnt/10)%(1<<20); //10times less than symbolrate
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//fprintf(stderr,"Frac %d\n",Frac);
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if(Frac==0)
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{
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fprintf(stderr,"Cross Int\n");
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tempmul=MultInt+1;
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}
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//usermem[samplecnt*2]=(0x5a<<24) | (0x21<<12) | tempmul;
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//usermem[samplecnt*2+1]=0x5A000000 | Frac;
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usermem[samplecnt*2]=0x5A000000 | FirstFrac;
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}
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}
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